EP80579 Datasheet, PDF (98/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 1-3.
Acronym Table
Term
SEC
SEC/DED
SOP/SOF
SMM
SPD
SSU
STR
TAP
TX
TCO
TCP
TDM
TDR
TFL
TID
USB
VCMI
VLAN
WDT
Description
Single-bit Error Correct
Single Error Correct/Double Error Detect - A specific data protection algorithm that
distributes data and ECC across 144 bits. Enables correction of single bit errors. Allows
detection of double bit errors.
Start Of Packet / Start Of Frame
System Management Mode
Serial Presence Detect
Security Services Unit
Suspend To Ram
Test Access Port used for testability and debug of the component.
Transmit
Total Cost of Ownership
Transmission Control Protocol
Time Division Multiplexed
Time Domain Reflectometry
Transit FIFO Level
See Transaction Identifier in Table 1-4
Universal Serial Bus
IA-32 core, IA-32 Core interface, Memory controller hub, I/O controller hub
Virtual Local Area Network
Watch Dog Timer
1.5
Glossary
This section presents a glossary for this document.
Table 1-4. Glossary Table (Sheet 1 of 5)
Term
µBGA
AIOC Direct (AD)
Agent
ALT Access Mode
Anti-Etch
Asserted
Asynchronous
Definition
Micro Ball Grid Array
AIOC Direct (AD) memory regions are not coherent with IA caches when accessed from AIOC
agents. Accesses to these memory regions enter the memory system through the Memory
Controller avoiding the IMCH. Memory regions that are not coherent with IA caches need not
be accessible to the IA CPU.
A logical device connected to a bus or shared interconnect that can either initiate accesses or
be the target of accesses.
Mode to allow the reading of write-only registers, usually used when saving/restoring register
content for power management sleep state implementations.
Any plane-split, void or cutout in a V_CC or GND plane is referred to as an anti-etch.
Signal is set to a level that represents logical true.
1. An event that causes a change in state with no relationship to a clock signal. 2. When
applied to transactions or a stream of transactions, a classification for those that do not require
service within a fixed time interval.
Intel^® EP80579 Integrated Processor Product Line Datasheet
98
August 2009
Order Number: 320066-003US