EP80579 Datasheet, PDF (669/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.6.1.25 Offset 80h: CCR2 - Channel 2 Channel Control Register
Table 16-321.Offset 80h: CCR2 - Channel 2 Channel Control Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: 80h
Offset End: 83h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
The bit descriptions for this register are identical to those for CCR0 described in Section 16.6.1.1.
Bit Reset
Value
Bit Access
16.6.1.26 Offset 84h: CSR2 - Channel 2 Channel Status Register
Table 16-322.Offset 84h: CSR2 - Channel 2 Channel Status Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: 84h
Offset End: 87h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
The bit descriptions for this register are identical to those for CSR0 described in Section 16.6.1.2.
Bit Reset
Value
Bit Access
16.6.1.27 Offset 88h: CDAR2 - Channel 2 Current Descriptor Address Register
Table 16-323.Offset 88h: CDAR2: Channel 2 Current Descriptor Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: 88h
Offset End: 8Bh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for CDAR0 described in Section 16.6.1.3.
Bit Access
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
669