EP80579 Datasheet, PDF (1888/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 49-79. GbE Transmit and Receive Timing Values — RMII 100/10 Base Mode
Symbol
Parameter
Min
Typical
Max
Units Notes
REF_CLK frequency
-
50
-
MHz
REF_CLK duty cycle
35
65
%
1
REF_CLK jitter
-
-
80
ps
Tsu
TXD[1:0], TX_EN,RXD[1:0], CRS_DV,
RX_ER Data Setup to REF_CLK rising edge
4
ns
TXD[1:0], TX_EN,RXD[1:0], CRS_DV,
Thold RX_ER Data hold from REF_CLK rising
2
ns
edge
Notes:
1.
Guaranteed by design. These values are typical values seen for this process, but not measured during
production testing.
49.5.13.3.8 MDIO Timing Specification
This section describes the AC timing for the MDIO interface.
Figure 49-40.MDIO Output Timing Diagram (EP80579 is Sourcing MDIO)
MDC
t₁
t₂
MDIO
Figure 49-41.MDIO Input Timing Diagram (PHY is Sourcing MDIO)
MDC
MDIO
t₅
t₃
t₄
B6599-01
B6551-01
Intel^® EP80579 Integrated Processor Product Line Datasheet
1888
August 2009
Order Number: 320066-003US