EP80579 Datasheet, PDF (1634/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 41-8. Timestamping Configurations
“Offset 0040h: TS_Ch_Control[0-7] -
Time Synchronization Channel
Control Register (Per Ethernet
Channel)” on page 1656
Version
[31]
Mode
[20:16
]
mm
[0]
ta
[1]
L2
L4
PTP
Version 1
1
2
ignore ignore Yes Yes
Yes
1
3
ignore ignore Yes Yes
Yes
Behavior
PTP
Version 2
Messages
All Event
Sync
Yes
Delay_REQ
Path_Delay_Req
Path Delay_Resp
All messages
Yes
Locked
Yes
No
1
7:4
Reserved
1
8
ignore
ignore
ignor ignor
e
e
ignore
ignore
User-defined mode
Yes
When the mode of operation is “Locked”, the timestamp taken after the SFD is frozen in
the snapshot registers and will not be updated until the software reset it.
When the mode of operation is not “Locked”, Each message is time stamped at the
reception of a start of frame delimiter (SFD), however the snapshot registers will be
overwritten with the arrival of a subsequent PTP message.
41.5.4
IEEE1588 over CAN
The time synchronization logic supports a hardware assist implementation for a CAN
network (e.g. DeviceNet). The 1588 protocol operates over a CAN network in much the
same way as it does over Ethernet, using the same time synchronization messages
identified earlier. However, the CAN protocol requires that these relatively lengthy
messages are broken into much smaller frames. This fragmentation prevents one
device from utilizing excessive bandwidth and maintains real time access to the
network for all devices.
Since the CAN protocol breaks up 1588 messages into small frames and the frames do
not carry 1588 specific identifiers, it is not practical to identify the 1588 Sync and Delay
Request messages in hardware. Therefore, the hardware merely captures a timestamp
into a holding register at the appropriate point in each and every frame that is
transmitted or received. The software has the responsibility to log the captured
timestamp as part of each frame, as the software processes the transmit done interrupt
(at the completion of a sent frame) or the received frame ready interrupt (at the
availability of a received frame).
This hardware assisted approach eliminates the potential for variable software interrupt
service times from introducing jitter in the time snapshot and provides improved
accuracy over a software-only approach. However, it does require significant software
support. For example, when using 1588 hardware support for CAN, the multiple
message buffers and screeners of the normal CAN block cannot be used in a continually
over-writing updating mode without processor intervention. This is due to the fact that
the software must read and save the time snapshot before the next message is sent or
received. Therefore, when 1588 hardware support is used, software will only be able to
effectively use 1 screener/buffer and must guarantee that all CAN frame interrupts are
Intel^® EP80579 Integrated Processor Product Line Datasheet
1634
August 2009
Order Number: 320066-003US