EP80579 Datasheet, PDF (1206/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
33.8
33.8.1
33.8.2
33.8.2.1
33.8.2.2
33.8.2.3
33.8.2.4
Configuration
The configuration of the SIW is very flexible and is based on the configuration
architecture implemented in typical Plug-and-Play components. The SIW is designed
for motherboard applications in which the resources required by their components are
known. With its flexible resource allocation architecture, the SIW allows the BIOS to
assign resources at POST.
Configuration Port Address
The SIW configuration port addresses for INDEX and DATA are controlled by the strap
pin SIU1_DTR# during reset. When SIU1_DTR# is driven to ‘1’ or left floating during
reset SIW configuration port addresses are fixed at 4Eh/4Fh. When SIU1_DTR# is
driven to ‘0’ during reset SIW configuration port addresses are fixed at 20Eh/20Fh.
Primary Configuration Address Decoder
After a PCI Reset (SIW_LRESET# pin asserted) or Power On Reset the SIW is in the
Run Mode with the UARTs and Watchdog timer disabled. They may be configured
through two standard Configuration I/O Ports (INDEX and DATA) by placing the SIW
into Configuration Mode.
The BIOS uses these configuration ports to initialize the logical devices at POST. The
INDEX and DATA ports are only valid when the SIW is in Configuration Mode.
The INDEX and DATA ports are effective only when the chip is in the Configuration
State. When the SIW is not in the Configuration State, reads return FFh and write data
is ignored.
Entering the Configuration State
The device enters the Configuration State by the following contiguous sequence:
1. Write 80H to Configuration Index Port.
2. Write 86H to Configuration Index Port.
Exiting the Configuration State
The device exits the Configuration State by the following contiguous sequence:
1. Write 68H to Configuration Index Port.
2. Write 08H to Configuration Index Port.
Configuration Sequence
To program the configuration registers, the following sequence must be followed.
1. Enter Configuration Mode.
2. Configure the Configuration Registers.
3. Exit Configuration Mode.
Configuration Mode
The system sets the logical device information and activates desired logical devices
through the INDEX and DATA ports. In configuration mode, the INDEX PORT is located
at the CONFIG PORT address and the DATA PORT is at INDEX PORT address + 1.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1206
August 2009
Order Number: 320066-003US