EP80579 Datasheet, PDF (1320/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 35-149.Bus M, Device 8, Function 0: Summary of Local Expansion Bus PCI
Configuration Registers (Sheet 2 of 2)
Offset Start Offset End
Register ID - Description
Default
Value
F2h
F3h
“Offset F2h: MCTL: Message Signalled Interrupt Control Register” on page 1333 0000h
F4h
F7h
“Offset F4h: MADR: Message Signalled Interrupt Address Register” on page 1333 00000000h
F8h
F9h
“Offset F8h: MDATA: Message Signalled Interrupt Data Register” on page 1334 0000h
35.12.1.1 Offset 00h: VID – Vendor Identification Register
Table 35-150.Offset 00h: VID: Vendor Identification Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:8:0
Offset Start: 00h
Offset End: 01h
Size: 16 bit
Default: 8086h
Power Well: Core
Bit Range Bit Acronym
Bit Description
15 : 00
VID
Vendor Identification: This register field contains the
PCI standard identification for Intel, 8086h.
Sticky
Bit Reset
Value
Bit Access
8086h
RO
35.12.1.2 Offset 02h: DID – Device Identification Register
This 16-bit register combined with the Vendor Identification register uniquely identifies
any PCI device. Writes to this register have no effect.
Table 35-151.Offset 02h: DID: Device Identification Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:8:0
Offset Start: 02h
Offset End: 03h
Size: 16 bit
Default: 503Dh
Power Well: Core
Bit Range Bit Acronym
Bit Description
15 : 00
DID
Device Identification Number: This is a 16-bit value
assigned to the Expansion Bus device.
Sticky
Bit Reset
Value
Bit Access
503Dh
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
1320
August 2009
Order Number: 320066-003US