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EP80579 Datasheet, PDF (232/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line | |||
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Intel® EP80579 Integrated Processor
Table 7-53. Bus M, Device 0, Function 0: Summary of Gigabit Ethernet Interface Registers
Mapped Through CSRBAR Memory BAR (Sheet 4 of 4)
Offset Start Offset End
Register ID - Description
Default
Value
4094h
40A0h
40A4h
40A8h
40ACh
40B0h
40C0h
40C4h
40C8h
40CCh
40D0h
40D4h
40D8h
40E0h
40E4h
40E8h
40ECh
40F0h
40F4h
40F8h
40FCh
5800h
5808h
5810h
5838h
5840h at 8h
5880h
05884h
5888h
588Ch
5F00h at 8h
9000h at 8h
9800h at 8h
0510h
0900h
0904h
4097h
40A3h
40A7h
40ABh
40AFh
40B3h
40C3h
40C7h
40CFh
40CFh
40D3h
40D7h
40DBh
40E3h
40E7h
40EBh
40EFh
40F3h
40F7h
40FBh
40FFh
5803h
580Bh
5813h
583Bh
5843h at 8h
5883h
5887h
588Bh
588Fh
5F03h at 8h
9003h at 8h
9803h at 8h
0513h
0903h
0907h
âGOTCH: Good Octets Transmitted Count High Registerâ on page 1522
00000000h
âRNBC: Receive No Buffers Count Registerâ on page 1523
00000000h
âRUC: Receive Undersize Count Registerâ on page 1523
00000000h
âRFC: Receive Fragment Count Registerâ on page 1524
00000000h
âROC: Receive Oversize Count Registerâ on page 1524
00000000h
âRJC: Receive Jabber Count Registerâ on page 1525
00000000h
âTORL: Total Octets Received Low Registerâ on page 1526
00000000h
âTORH: Total Octets Received High Registerâ on page 1526
00000000h
âTOTL: Total Octets Transmitted Low Registerâ on page 1527
00000000h
âTOTH: Total Octets Transmitted High Registerâ on page 1528
00000000h
âTPR: Total Packets Received Registerâ on page 1528
00000000h
âTPT: Total Packets Transmitted Registerâ on page 1529
00000000h
âPTC64 - Packets Transmitted Count (64 Bytes) Registerâ on page 1529
00000000h
âPTC255: Packets Transmitted Count (128-255 Bytes) Registerâ on page 1530
00000000h
âPTC511: Packets Transmitted Count (256-511 Bytes) Registerâ on page 1530
00000000h
âPTC1023: Packets Transmitted Count (512-1023 Bytes) Registerâ on page 1531 00000000h
âPTC1522: Packets Transmitted Count (1024-1522 Bytes) Registerâ on page 1531 00000000h
âMPTC: Multicast Packets Transmitted Count Registerâ on page 1532
00000000h
âBPTC: Broadcast Packets Transmitted Count Registerâ on page 1532
00000000h
âTSCTC: TCP Segmentation Context Transmitted Count Registerâ on page 1533 00000000h
âTSCTFC: TCP Segmentation Context Transmit Fail Count Registerâ on page 1533 00000000h
âWUC - Wake Up Control Register (0x05800; RW)â on page 1534
00000000h
âWUFC - Wake Up Filter Control Register (0x05808; RW)â on page 1535
00000000h
âWUS - Wake Up Status Register (0x05810; RW)â on page 1536
00000000h
âIPAV - IP Address Valid Register (0x05838; RW)â on page 1537
00000000h
âIP4AT (0x5840 - 0x5858; RW)[0-3]: IPv4 Address Table Registersâ on page 1538 XXXXXXXXh
âIPV6_ADDR0BYTES_1_4 â IPv6 Address Table Register (0x5880), Bytes 1 - 4â on
page 1539
XXXXXXXXh
âIPV6_ADDR0BYTES_5_8 â IPv6 Address Table Register, Bytes 5 - 8â on page 1539 XXXXXXXXh
âIPV6_ADDR0BYTES_9_12 â IPv6 Address Table Register, Bytes 9 - 12â on
page 1540
XXXXXXXXh
âIPV6_ADDR0BYTES_13_16 â IPv6 Address Table Register, Bytes 13 - 16â on
page 1541
XXXXXXXXh
âFFLT[0-3] - Flexible Filter Length Table Registers (0x5F00 - 0x5F18; RW)â on
page 1542
00000000h
âFFMT[0-127] - Flexible Filter Mask Table Registers (0x9000 - 0x93F8; RW)â on
page 1543
0000000Xh
âFFVT[0-127]: Flexible Filter Value Table Registersâ on page 1544
XXXXXXXXh
âINTBUS_ERR_STAT - Internal Bus Error Status Registerâ on page 1544
00000000h
âMEM_TST - Memory Error Test Registerâ on page 1546
00000000h
âMEM_STS - Memory Error Status Registerâ on page 1547
007F0000h
Intel® EP80579 Integrated Processor Product Line Datasheet
232
August 2009
Order Number: 320066-003US
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