EP80579 Datasheet, PDF (657/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 16-298.Offset 04h: CSR0 - Channel 0 Channel Status Register (Sheet 2 of 2)
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: 04h
Offset End: 07h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
01
00
Bit Acronym
Bit Description
Sticky
EOT
EOC
End of Transfer:
0 = Software clears this bit by writing a ‘1’ to the bit
location.
1 = Indicates that the channel has successfully
completed an error-free DMA transfer of at least
one descriptor. If the End of Transfer Interrupt
Enable bit in the DCR is set, this generates an
interrupt to the processor. Software can use this bit
for polling if interrupts are not enabled.
End of Chain:
0 = Software clears this bit by writing a ‘1’ to the bit
location.
1 = Indicates that the channel has successfully
completed an error-free DMA transfer, and it is the
last descriptor in a chain descriptor. If the End of
Chain Interrupt Enable bit in the DCR is set, this
generates an interrupt to the processor. Software
can use this bit for polling if interrupts are not
enabled.
Bit Reset
Value
0b
0b
Bit Access
RWC
RWC
16.6.1.3
Offset 08h: CDAR0 - Channel 0 Current Descriptor Address Register
The Current Descriptor Address Register (CDAR) contains the lower 32-bit address of
the current chain descriptor in local system memory. This register is loaded by the
IMCH when a new chain descriptor is read. All chain descriptors are aligned on an eight
double-word (32-bit) boundary.
Table 16-299.Offset 08h: CDAR0 - Channel 0 Current Descriptor Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: 08h
Offset End: 0Bh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 : 05
04 : 00
Bit Acronym
Bit Description
CDADD
Reserved
Current Descriptor Address: Lower 32 bits of the
local system memory address of the current chain
descriptor that is read by the channel. The descriptor
address must be eight double-word aligned.
Reserved
Sticky
Bit Reset
Value
0000000h
00h
Bit Access
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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