EP80579 Datasheet, PDF (672/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.6.1.34 Offset A4h: NDUAR2 - Channel 2 Next Descriptor Upper
Address Register
Table 16-330.Offset A4h: NDUAR2 - Channel 2 Next Descriptor Upper Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: A4h
Offset End: A7h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for NDUAR0 described in Section 16.6.1.10.
Bit Access
16.6.1.35 Offset A8h: TCR2 - Channel 2 Transfer Count Register
Table 16-331.Offset A8h: DCR2 - Channel 2Transfer Control Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: A8h
Offset End: ABh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for DCR0 described in Section 16.6.1.11.
Bit Access
16.6.1.36 Offset ACh: DCR2 - Channel 2 Descriptor Control Register
Table 16-332.Offset ACh: DCR2 - Channel 2 Descriptor Control Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: ACh
Offset End: AFh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for DCR0 described in Section 16.6.1.12.
Bit Access
Intel^® EP80579 Integrated Processor Product Line Datasheet
672
August 2009
Order Number: 320066-003US