EP80579 Datasheet, PDF (1700/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
42.5.1.2
EXP_TIMING_CS[1-7] - Expansion Bus Timing Registers
The EXP_TIMING_CS registers may only be written if there is not an outstanding
Expansion bus transaction. Software must ensure that all outstanding Expansion bus
transfers are complete before changing the EXP_TIMING_CS registers.
Table 42-7. EXP_TIMING_CS[1-7] - Expansion Bus Timing Registers (Sheet 1 of 2)
Description: Timing and Control Registers
View: PCI
BAR: CSRBAR
Bus:Device:Function: M:8:0
00000004h
Offset Start: at 4h
Offset End: 00000007h
at 4h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31
30
29 : 28
27 :26
25 : 22
21 : 20
19 : 16
15 :14
13 : 09
Bit Acronym
Bit Description
Sticky
CSx_EN
0 = Chip Select x disabled
1 = Chip Select x enabled
PAR_EN
0 = Parity is not generated or compared
1 = Parity is generated and compared
Parity is only supported for Intel, Motorola, and Micron
ZBT modes.
T1 – Address timing
T1_ADDR_TM 00 = Generate normal address phase timing
01 - 11 = Extend address phase by 1 - 3 clocks
T2 – Setup / Chip Select Timing
T2_SU_CS_TM 00 = Generate normal setup phase timing
01 - 11 = Extend setup phase by 1 - 3 clocks
T3 – Strobe Timing
T3_STRB_TM 0000 = Generate normal strobe phase timing
0001-1111 = Extend strobe phase by 1 - 15 clocks
T4 – Hold Timing
T4_HOLD_TM 00 = Generate normal hold phase timing
01 - 11 = Extend hold phase by 1 - 3 clocks
T5 – Recovery Timing
T5_RCVRY_TM 0000 = Generate normal recovery phase timing
0001-1111 = Extend recovery phase by 1 - 15 clocks
CYC_TYPE
00 = Configures the Expansion bus for Intel cycles.
01 = Configures the Expansion bus for Motorola cycles.
10 = Configures the Expansion bus for HPI cycles.
(HPI reserved for chip selects [7:4] only)
11 = Configures the Expansion bus for Micron ZBT cycles
CNFG_4_0
Device Configuration Size. Calculated using the formula:
SIZE OF ADDR SPACE = 2^{(9+CNFG[4:1]+16*CNFG[0])}
For Example:
00000 = Address space of 2⁹ = 512 Bytes
00010 = Address space of 2¹⁰ = 1024 Bytes
…
10000 = Address space of 2¹⁷ = 128 Kbytes
…
11100 = Address space of 2²³ = 8 Mbytes
11110 = Address space of 2²⁴ = 16 Mbytes
XXXX1 = Address space of 2²⁵ = 32Mbytes
Bit Reset
Value
0h
0h
0h
0h
0h
0h
0h
0h
0h
Bit Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1700
August 2009
Order Number: 320066-003US