EP80579 Datasheet, PDF (1835/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Figure 49-3. S0 to S5 to S0 Timings, S3_COLD
S0
S 0 S3
S3 S4
S5
S4 S3
S3/S4/S 5 S0
S0
STPCLK#
NSI Message
SUS_ STAT#
PLTRST#,
PCIRST#
SLP_S3#
(S3COLD Config)
SLP_S4#
SLP_S5#
Wake Event
PWROK
VRMPWRGD ,
PWRGD
SYS_PWR_OK
Vcc
Supplies
t 280
t 215
t 283
t 284
t 287
t 291
t 295
t 300
t 217
t 302
t 218
t 299
t 298
t 297
t 296
t 289
t 294
t 214
B 6553-01
49.5.1.2.2 Power Management Miscellaneous Timing Diagrams
Refer to Section 6.1.3, “EP80579 Power Sequencing and Reset Sequence” for additional
timing requirements related to power management signals.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1835