EP80579 Datasheet, PDF (1766/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 48-24. Expansion Bus Signals (Sheet 2 of 3)
Signal Name
EX_CS[7:0]#
EX_DATA[15:0]
IO Type
LVTTL,3.3V
LVTTL,3.3V
Direction
Ball
Count
IO
8
IO
16
External
Pull-Up/
Down
[Ohms]
BSC/
XOR
Signal Description Normal/Alternate Mode
Expansion Bus Target Chip Selects: Chip selects
to select Expansion Bus devices.
BSC
EXCS has pull-ups enabled when PLL_LOCK is
deasserted. These pull-ups are disabled when
PLL_LOCK is asserted and the EP80579 drives
the signal based upon grant. EXCS is driven by
the EP80579.
These signals are active-low.
Expansion Bus Data: The 16-bit data bus for the
Expansion bus.
BSC
EXDA has pull-ups enabled when PLL_LOCK is
deasserted. These pull-ups are disabled when
PLL_LOCK is asserted and the EP80579 drives
the signal based upon grant. EXDA is driven by
the EP80579 during outbound writes, and
inbound reads, and when the bus is idle.
EX_IOWAIT#
LVTTL,3.3V I
1
EX_PARITY[1:0] LVTTL,3.3V IO
2
BSC
BSC
Expansion bus Target Wait #. EX_IOWAIT_N is
always an input.
Reset value is driven from the board.
This signal is active-low.
Expansion Bus Parity: Parity bits for the two
bytes on the data bus.
EXPAR0 = Parity for EXDA[7:0]
EXPAR1 = Parity for EXDA[15:8]
EXPARx has pull-ups enabled when PLL_LOCK is
deasserted. These pull-ups are disabled when
PLL_LOCK is asserted. EXPARx is driven with the
same timing as EXDAx.
EX_RD#
LVTTL,3.3V IO
1
EX_RDY[3:0]#
LVTTL,3.3V I
4
EX_BURST
LVTTL,3.3V I
1
EX_WR#
LVTTL,3.3V IO
1
BSC
BSC
BSC
BSC
Expansion Bus Read: Read signal for the
Expansion Bus.
EXRDN has pull-ups enabled when PLL_LOCK is
deasserted. These pull-ups are disabled when
PLL_LOCK is asserted and the EP80579 drives
the signal based upon grant. EXRDN is driven by
the EP80579.
This signal is active-low.
Expansion Bus HPI Ready: HPI ready signal for
the Expansion Bus. EXRDYx are always inputs.
EXRDY0 = Ready signal for Chip Select #4
EXRDY1 = Ready signal for Chip Select #5
EXRDY2 = Ready signal for Chip Select #6
EXRDY3 = Ready signal for Chip Select #7
This signal is active-low.
Expansion Bus Burst Size: Burst size signal.
EX_BURST is an input in normal operation.
Expansion Bus Write: Write signal.
This signal is active-low.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1766
August 2009
Order Number: 320066-003US