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EP80579 Datasheet, PDF (158/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
Table 5-30. Summary of SSP Error Conditions
Event
Type
Fatalitya
Reports via
Notes
Functional
Receiver Overrun
(ROR)
Uncorrectable
Fatal
SSP Interrupt
Receive FIFO is full, any incoming data
is discarded.
a. “Fatal” events result in data loss or data corruption that the unit cannot repair, “Non-Fatal” events do not.
Table 5-31 summarizes the capabilities of the SSP error handling for each of the
features that the unit is expected to provide.
Table 5-31. Summary of SSP Error Reporting Capabilities
Feature
Implementation
Enabling and
Masking Error
Reporting
SSP does not provide the ability to enable or mask the interrupt from an ROR error
condition.
The SMIA and SMME registers from the signal target capability in the PCI configuration
header for the SSP unit also support error enabling and masking. Using these registers to
mask the SSP Interrupt masks both error and functional events since the SSP unit uses
this interrupt to signal both error and functional conditions.
Logging Details
The SINT register from the signal target capability in the PCI configuration header for the
SSP unit provides read-only access to the state of the interrupt signals from SSP.
SSP does not log additional details on its errors.
Reporting Multiple SSP can only generate a single error. The unit can indicate at most one outstanding error
Errors
at any time.
Data Poisoning
SSP error conditions result in loss of data and system interrupt. There is no need to poison
in these cases.
See Section 40.4, “Register Summary”and Section 40.3.2, “Error Handling” for
additional details.
5.6.4
Local Expansion Bus
The Local Expansion Bus unit signals error conditions from the interface into the
EP80579 through a single interrupt signal that is used exclusively for errors. In
addition, this unit signals errors from the internal bridge through a separate interrupt.
Table 5-32 summarizes the error conditions that the local expansion bus captures.
.
Table 5-32. Summary of Local Expansion Bus Error Conditions
Event
Type
Fatalitya
Reports via
Notes
Parity Error
Uncorrectable
Fatal
LEB Parity Parity error on outbound read from the
Error Interrupt EP80579.
a. “Fatal” events result in data loss or data corruption that the unit cannot repair, “Non-Fatal” events do not.
Table 5-33 summarizes the capabilities of the local expansion bus error handling for
each of the features that the unit is expected to provide.
Intel® EP80579 Integrated Processor Product Line Datasheet
158
August 2009
Order Number: 320066-003US