EP80579 Datasheet, PDF (370/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 14-1. Pseudocode for EDMA Errors (Sheet 2 of 2)
Condition
Source
Action
The destination
address is not aligned
as specified by the
destination address bit
for EDMA channel 3.
Data parity Error in
reading source data
from system memory
for EDMA channel 3.
Received configuration
write command when
EDMA is in Normal
Mode for EDMA
channel 3.
EDMA channel 2 errors
EDMA channel 1 errors
EDMA channel 0 errors
Internal
DO_SERR and set PCISTS10[SSE] if (PCICMD10[SERRE]=1 AND
EDMA_EMASK[2]=0 AND SERRCMD_EDMA[2]=1 AND
R_EDGE{EDMA_FERR[26] OR EDMA_NERR[26]});
DO_SMI if EDMA_EMASK[2]=0 AND SMICMD_EDMA[2]=1 AND
R_EDGE{EDMA_FERR[26] OR EDMA_NERR[26]};
DO_SCI if EDMA_EMASK[2]=0 AND SCICMD_EDMA[2]=1 AND
R_EDGE{EDMA_FERR[26] OR EDMA_NERR[26]};
DO_MCERR if EDMA_EMASK[2]=0 AND MCERRCMD_EDMA[2]=1 AND
R_EDGE{EDMA_FERR[26] OR EDMA_NERR[26]};
Internal
DO_SERR and set PCISTS10[SSE] if (PCICMD10[SERRE]=1 AND
EDMA_EMASK[1]=0 AND SERRCMD_EDMA[1]=1 AND
R_EDGE{EDMA_FERR[25] OR EDMA_NERR[25]});
DO_SMI if EDMA_EMASK[1]=0 AND SMICMD_EDMA[1]=1 AND
R_EDGE{EDMA_FERR[25] OR EDMA_NERR[25]};
DO_SCI if EDMA_EMASK[1]=0 AND SCICMD_EDMA[1]=1 AND
R_EDGE{EDMA_FERR[25] OR EDMA_NERR[25]};
DO_MCERR if EDMA_EMASK1]=0 AND MCERRCMD_EDMA1]=1 AND
R_EDGE{EDMA_FERR[25] OR EDMA_NERR[25]};
Internal
DO_SERR and set PCISTS10[SSE] if (PCICMD10[SERRE]=1 AND
EDMA_EMASK[0]=0 AND SERRCMD_EDMA[0]=1 AND
R_EDGE{EDMA_FERR[24] OR EDMA_NERR[24]});
DO_SMI if EDMA_EMASK[0]=0 AND SMICMD_EDMA[0]=1 AND
R_EDGE{EDMA_FERR[24] OR EDMA_NERR[24]};
DO_SCI if EDMA_EMASK[0]=0 AND SCICMD_EDMA[0]=1 AND
R_EDGE{EDMA_FERR[24] OR EDMA_NERR[24]};
DO_MCERR if EDMA_EMASK[0]=0 AND MCERRCMD_EDMA[0]=1 AND
R_EDGE{EDMA_FERR[24] OR EDMA_NERR[24]};
Internal
Same bit functionality as bits 31:24 except these are for EDMA channel
2. (Use bits 23:16)
Internal
Same bit functionality as bits 31:24 except these are for EDMA channel
1. (Use bits 15:8)
Internal
Same bit functionality as bits 31:24 except these are for EDMA channel
0. (Use bits 7:0)
Status
EDMA_FERR[26]
EDMA_FERR[25]
EDMA_FERR[24]
§§
Intel^® EP80579 Integrated Processor Product Line Datasheet
370
August 2009
Order Number: 320066-003US