EP80579 Datasheet, PDF (1257/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
35.6.1.28 Offset ECh: SINT – Signal Target Raw Interrupt Register
Table 35-31. Offset ECh: SINT: Signal Target Raw Interrupt Register
Description:
View: PCI 1
BAR: Configuration
Bus:Device:Function: M:0:0
Offset Start: ECh
Offset End: ECh
View: PCI 2
BAR: Configuration
Bus:Device:Function: M:1:0
Offset Start: ECh
Offset End: ECh
View: PCI 3
BAR: Configuration
Bus:Device:Function: M:2:0
Offset Start: ECh
Offset End: ECh
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range
07 : 03
02
01
00
Bit Acronym
Bit Description
Sticky
Reserved
SINT2
SINT1
SINT0
Interrupt: Read-only view of gbex_interrupt0 which carries
all interrupt sources (functional plus AIOC internal bus
errors and internal memory errors) and the functional
interrupts are throttled by a timer
Interrupt: Read-only view of gbex_interrupt1 which carries
all interrupt sources (functional plus AIOC internal bus
errors and internal memory errors) but the functional
interrupts are not throttled
Interrupt: Read-only view of gbex_error_interrupt which
carries only AIOC internal bus errors and internal memory
parity or uncorrectable ECC errors
Bit Reset
Value
0h
0h
0h
0h
Bit Access
RO
RO
RO
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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