EP80579 Datasheet, PDF (1646/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
41.6.1.6 Offset 0014h: TS_PPS - PPS Compare Register
Register
Name
TS_PPS_Compare
Access
(See below.) Reset Value 0xFFFF_FFFF
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PPS_Compare Value[31:0]
Table 41-16. Offset 0014h: TS_PPS_Compare Register
Description:
View: PCI
BAR: CSRBAR
Bus:Device:Function: M:7:0
Offset Start: 00000014h
Offset End: 00000017h
Size: 32 bits
Default: FFFFFFFFh
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
31 : 0
The PPS Compare register is a 32-bit register that
contains a value that will be compared against the lower
32 bits of system time. The value placed in this register
defines the value of the lower 32 bits of system time
required to generate a 1 pulse per second signal to an
external scope. When the two values are equal, the pin
ts_pps is asserted
TS_PPS_Compa
re
Concurrently,
the
state
of
the
signal
is
visible
as
the
pps
bit in the TS_Event register. The pps signal can also
interrupt the Host if the ppsm bit in the TS_Channel
register is set. It is the firmware's responsibility to
calculate the new compare value for the next pulse per
second and update this register accordingly. The bits of
this register are set at reset in order to prevent ts_pps
from asserting right after reset.
FFFFFFFFh
Note: The PPS output controlled by this compare register is independent of the TM bit in the TS_TEST register
Bit Access
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1646
August 2009
Order Number: 320066-003US