EP80579 Datasheet, PDF (619/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.5.1.19 Offset C0h: DQSOFCS11 - DQS Calibration Register
This register determines DQS7, 6, 5, & 4 fine DQS delay when reading from rank 1
Table 16-244.Offset C0h: DQSOFCS11 - DQS Calibration Register
Description: DQSOFCS11: DQS Calibration Register
View: PCI
BAR: SMRBASE
Bus:Device:Function: 0:0:0
Offset Start: C0h
Offset End: C3h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 :28
27 :24
23 :20
19 :16
15 :12
11 :08
07 :04
03 :00
Bit Acronym
Bit Description
Reserved
DQS07
Reserved
DQS06
Reserved
DQS05
Reserved
DQS04
Reserved
Rank 1 DQS07: Fine delay
Reserved
Rank 1 DQS06: Fine delay
Reserved
Rank 1 DQS05: Fine delay
Reserved
Rank 1 DQS04: Fine delay
Sticky
N
Y
N
Y
N
Y
N
Y
Bit Reset
Value
0h
0h
0h
0h
0h
0h
0h
0h
Bit Access
RO
RW
RO
RW
RO
RW
RO
RW
.
16.5.1.20 Offset C7h: DQSOFCS12 - DQS Calibration Register
This register determines DQS 8 fine DQS delay when reading from rank 1
Table 16-245.Offset C7h: DQSOFCS12 - DQS Calibration Register
Description: DQSOFCS12: DQS Calibration Register
View: PCI
BAR: SMRBASE
Bus:Device:Function: 0:0:0
Offset Start: C7h
Offset End: C7h
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range
07 :04
03 :00
Bit Acronym
Bit Description
Reserved
DQS08
Reserved
Rank 1 DQS08: Fine delay
Sticky
N
Y
Bit Reset
Value
0h
0h
Bit Access
RO
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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