EP80579 Datasheet, PDF (690/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 17-1. Bus 0, Device 31, Function 0: Summary of Root Complex Configuration
Registers Mapped Through RCBA Memory BAR (Sheet 2 of 2)
Offset Start Offset End
Register ID - Description
Default
Value
01AAh
3108h
3140h
3144h
31FFh
3400h
3404h
3410h
3414h
3418h
341Ch
01ABh
310Bh
3141h
3145h
31FFh
3403h
3407h
3413h
3417h
341Bh
341Fh
“Offset 01AAh: LSTS - Link Status Register” on page 700
0041h
“Offset 3108h: D29IP - Device 29 Interrupt Pin Register” on page 702
10004321h
“Offset 3140h: D31IR - Device 31 Interrupt Route Register” on page 702
3210h
“Offset 3144h: D29IR - Device 29 Interrupt Route Register” on page 703
3210h
“Offset 31FFh: OIC - Other Interrupt Control Register” on page 704
0h
“Offset 3400h: RC - RTC Configuration Register” on page 704
0h
“Offset 3404h: HPTC - High Performance Precision Timer Configuration Register”
on page 705
0h
“Offset 3410h: GCS - General Control and Status Register” on page 706
Variable
“Offset 3414h: BUC - Backed Up Control Register” on page 708
Variable
“Offset 3418h: FD - Function Disable Register” on page 709
00000080h
“Offset 341Ch: PRC - Power Reduction Control Register Clock Gating” on page 711 0h
Table 17-2. RCBA Base Address Registers in the IA F View
Offset Start Offset End
Register ID - Description
3000h
3100h
3001h
3103h
“Offset 3000h: TCTL - TCO Control Register” on page 700
“Offset 3100h: D31IP - Device 31 Interrupt Pin Register” on page 701
Default
Value
0h
00042210h
Intel^® EP80579 Integrated Processor Product Line Datasheet
690
August 2009
Order Number: 320066-003US