EP80579 Datasheet, PDF (1750/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 48-14. LPC and FWH Interface Signals (Sheet 2 of 2)
Signal Name
LDRQ[0]#
PCICLK
IO Type
LVTTL,3.3V
LVTTL,3.3V
TOTAL
Direction
Ball
Count
I
1
I
1
7
External
Pull-Up/
Down
[Ohms]
BSC/
XOR
Signal Description Normal/Alternate Mode
BSC
BSC
LPC Serial DMA/Master Request Input Bit 0:
Used by LPC devices, such as Super I/O chips,
to request DMA or bus master access.This signal
is typically connected to external Super I/O
device.
LPC clock. PCI clock used for the LPC bus (up to
33Mhz)
48.4.3.5 SMBus
Table 48-15. SMBus Interface Signals
Signal Name
IO Type
SMBDATA
LVTTL,3.3V
SMBCLK
LVTTL,3.3V
GP11_SMBALERT#
INTRUDER#
LVTTL,3.3V
Direction
Ball
Count
External
Pull-Up/
Down
[Ohms]
OD I/O
1
8.2K Up
OD I/O
1
8.2K Up
I
1
BSC/
XOR
Signal Description Normal/Alternate Mode
BSC
BSC
SMBus Data: SMBus data signal. An external
pull-up is required.
SMBus Clock: SMBus clock signal. An external
pull-up is required.
See GPIO interface.
SMBus Intruder Detect: Detects if the system
case has been opened. Can be set to disables
the system if the box is detected open. This
input signal is in the RTC well. This pin's status
is readable, so it can be used like a GPI if the
Intruder switch is not needed.
SMLINK[1:0]
LVTTL,3.3V OD I/O
2
SMBSDA
SMBSCL
LVTTL,3.3V OD I/O
1
LVTTL,3.3V OD I/O
1
TOTAL
7
8.2K Up
8.2K Up
8.2K Up
BSC
BSC
BSC
SMBus System Management Link: SMBus link
to optional external system management ASIC
or LAN controller. External pull-ups are
required.
Note that SMLINK[0] corresponds to an SMBus
Clock signal, and SMLINK[1] corresponds to an
SMBus Data signal.
SMBus Data: Data signal for the IMCH SMBus
interface. An external pull-up is required.
SMBus Clock: Clock signal for the IMCH SMBus
interface. An external pull-up is required.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1750
August 2009
Order Number: 320066-003US