EP80579 Datasheet, PDF (1752/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 48-16. UART Signals (Sheet 2 of 3)
Signal Name
SIU_DTR1#
IO Type
LVTTL,3.3V
Direction
Ball
Count
I/O
1
External
Pull-Up/
Down
[Ohms]
BSC/
XOR
Signal Description Normal/Alternate Mode
BSC
UART Port 1 Data Terminal Ready: When low,
this pin informs the modem or data set that the
UART port 1 is ready to establish a
communication link. The DTR# output signal can
be set to an active low by programming the DTR
(bit 0) of the Modem Control Register to a logic
‘1’. A Reset operation sets this signal to its
inactive state (logic ’1’). LOOP mode operation
holds this signal in its inactive state.
SIW Configuration Port Address Select Strap:
This strap selects the IO address for the SIW
configuration port.
The EP80579 interprets the strap as follows:
0 = IO Addresses 20Eh and 20Fh
1 = IO Addresses 04Eh and 04Fh (default)
SIU_DTR2#
LVTTL,3.3V I/O
1
SIU_RI1#
LVTTL,3.3V I/O
1
SIU_RI2#
LVTTL,3.3V I/O
1
SIU_RTS1#
LVTTL,3.3V I/O
1
SIU_RTS2#
LVTTL,3.3V I/O
1
SIU_RXD1
SIU_RXD2
LVTTL,3.3V I/O
1
LVTTL,3.3V I/O
1
BSC
BSC
BSC
BSC
BSC
BSC
BSC
UART Port 2 Data Terminal Ready. Refer to UART
Port 1 Data Terminal Ready (SIU_DTR1#) for
more information.
Note: Do not drive this signal low until the
CPURST# signal is de-asserted.
UART Port 1 Ring Indicator: Active low, this pin
indicates that a telephone ringing signal has
been received by the external agent for UART
port 1.
Note: This pin is Modem Status Input whose
condition can be tested by the processor by
reading bit 6 (RI) of the MSR. Bit 6 is the
complement of the RI# signal. Bit 2 (TERI) of
the MSR indicates whether the RI# input has
transitioned back to an inactive state. When the
RI bit of the MSR changes from a 1 to 0 an
interrupt is generated if the Modem Status
Interrupt is enabled.
UART Port 2 Ring Indicator. Refer to UART Port 1
Ring Indicator (SIU_RI1#) for more information.
UART Port 1 Request To Send: When low this pin
informs the modem or data set that UART port 1
is wants to send data on an established
communication link. The RTS# output signal can
be set to an active low by programming the RTS
(bit 1) of the Modem Control Register to a logic
‘1’. A Reset operation sets this signal to its
inactive state (logic ‘1’). LOOP mode operation
holds this signal in its inactive state.
Note: Do not drive this signal low until the
CPURST# signal is de-asserted.
UART Port 2 Request to Send. Refer to UART
Port 1 Request to Send (SIU_RTS1#) for more
information.
Note: Do not drive this signal low until the
CPURST# signal is de-asserted.
UART Port 1 Serial Data Input: Serial data input
form device pin to the receive port for UART port
1.
UART Port 2 Serial Data Input: Serial data input
form device pin to the receive port for UART port
2.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1752
August 2009
Order Number: 320066-003US