EP80579 Datasheet, PDF (962/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
25.2.1.7
PSCR - Port Status and Control Register
After a Power-up reset, Global reset, or Host Controller reset, the initial conditions of a
port are: No device connected, Port disabled, and the bus line status is 00 (single-
ended zero).
Table 25-28. PSCR - Port Status and Control Register (Sheet 1 of 2)
Description:
View: PCI 1
BAR: USBIOBAR (IO)
Bus:Device:Function: 0:29:0
Offset Start:^a 10h
Offset End: 11h
View: PCI 2
BAR: USBIOBAR (IO)
Bus:Device:Function: 0:29:0
Offset Start: 12h
Offset End: 13h
Size: 16 bit
Default: 0080h
Power Well: Core
Bit Range
15 : 13
12
11
10
09
08
07
Bit Acronym
Bit Description
Sticky
Reserved
SUS
OCI
OCS
PRST
LS
Reserved
Reserved
Suspend:
0 = Port not in suspend state.
1 = Port in suspend state.
This bit should not be written to a 1 if global suspend is
active (bit 3=1 in the USBCMD register). This bit and bit
2 below define the hub states:
Bits [12,2] Hub State
X,0
Disable
0,1
Enable
1,1
Suspend
When in suspend state, downstream propagation of data
is blocked on this port, except for single-ended 0 resets
(global reset and port reset). The blocking occurs at the
end of the current transaction, if a transaction was in
progress when this bit was written to 1. In the suspend
state, the port is sensitive to resume detection. The bit
status does not change until the port is suspended and
that there may be a delay in suspending a port if there is
a transaction currently in progress on the USB.
Normally, if a transaction is in progress when this bit is
set, the port will be suspended when the current
transaction completes. However, in the case of a specific
error condition (out transaction with babble), the CMI
may issue a start-of-frame, and then suspend the port.
Overcurrent Indicator: This bit is cleared by software
writing a ‘1’.
0 = Overcurrent pin inactive.
1 = Overcurrent pin has gone from inactive to active on
this port.
Software clears this bit by writing a 1 to it.
Overcurrent Status: This bit indicates the current
status of the OC# pin for this port. This bit is set and
cleared by hardware.
0 = This port does not have an overcurrent condition.
1 = This port currently has an overcurrent condition.
Port Reset:
0 = Port is not disabled.
1 = Port is disabled and sends the USB Reset signaling.
Low Speed Device Attached:
0 = Full speed device is attached.
1 = Low speed device is attached to this port. Writes
have no effect.
Reserved: Always read as 1.
Bit Reset
Value
0h
0h
0h
0h
0h
0h
1
Bit Access
RW
RWC
RO
RW
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
962
August 2009
Order Number: 320066-003US