EP80579 Datasheet, PDF (1043/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
— Resets the ERROR_GOOD#_STS bit
— Sets the DONE_STS bit
4. If a valid packet was received from the device that was more than one byte in
length (indicating it was a data packet), then the debug port controller:
— Transmits an ACK handshake packet
— Resets the ERROR_GOOD#_STS bit
— Sets the DONE_STS bit
5. If no valid packet is received, then the debug port controller:
— Sets the EXCEPTION_STS field to 001b
— Sets the ERROR_GOOD#_STS bit,
— Sets the DONE_STS bit.
26.13.3.4 Debug Software
26.13.3.4.1 Enabling the Debug Port
There are two mutually exclusive conditions that debug software must address as part
of its startup processing:
• The EHCI has been initialized by system software.
• The EHCI has not been initialized by system software.
Debug software can determine the current ‘initialized’ state of the EHCI by examining
the Configure Flag in the EHCI USB 2.0 Command Register. If this flag is set, then
system software has initialized the EHCI. Otherwise, the EHCI must not be considered
initialized. Debug software will initialize the debug port registers depending on the
state of the EHCI. However, before this can be accomplished, debug software must
determine which root USB port is designated as the debug port.
26.13.3.4.2 Determining the Debug Port
Debug software can easily determine which USB root port has been designated as the
debug port by examining bits 20:23 of the EHCI Host Controller Structural Parameters
register. This 4-bit field represents the numeric value assigned to the debug port (i.e.,
0000 == port 0, 0001 == port 1, 0010 == port 2 …… 1111 == port 15). This value is
0000 (port 0).
26.13.3.4.3 Debug Software Startup with Non-Initialized EHCI
Debug software can attempt to use the debug port if, after setting the OWNER_CNT bit,
the Current Connect Status bit in the appropriate (See Section 26.13.3.4.2,
“Determining the Debug Port”) PORTSC register is set. If the Current Connect Status
bit is not set, then debug software may choose to terminate, or it may choose to wait
until a device is connected.
If a device is connected to the port, then debug software must reset/enable the port.
Debug software does this by setting and then clearing the Port Reset bit in the PORTSC
register. Software must set the Run/Stop bit in the EHCI Command Register before
clearing the Port Reset bit in order to complete the reset and to enable the port. To
guarantee a successful reset, debug software must also keep the Port Reset bit set for
at least 50 ms. Due to possible delays, this bit may not change to zero immediately;
reset is complete when this bit reads as zero. Software must not continue until this bit
reads zero.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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