EP80579 Datasheet, PDF (933/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 24-50. Offset 11h: SCMD: Slave Command Register (Sheet 2 of 2)
Description:
View: PCI
Size: 8 bit
BAR: SM_BASE (IO)
Default: 00h
Bus:Device:Function: 0:31:3
Offset Start: 11h
Offset End: 11h
Power Well: Resume^a
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
Bit Access
Software sets this bit to 1 to enable the generation of
interrupt or SMI# when HOST_NOTIFY_STS is 1. This
enable does not affect the setting of the
HOST_NOTIFY_STS bit. When the interrupt is
generated, either PIRQB or SMI# is generated,
HOST_
depending on the value of the SMB_SMI_EN bit (D31,
00
NOTIFY_ _{F3, Off40h, B1). If the HOST_NOTIFY_STS bit is set}
INTREN
when this bit is written to a 1, then the interrupt (or
SMI#) will be generated. The interrupt (or SMI#) is
logically generated by ANDing the STS and INTREN bits.
0 = Disable
1 = Enable
0h
RW
a. This register is in the resume well and is reset by CF9 RESET or RSMRST#. All bits in this register are implemented in the 64
kHz clock domain. Therefore, software must poll the register until a write takes effect before assuming that a write has
completed internally.
24.8.2.5
Offset 14h: NDA: Notify Device Address Register
This register is in the resume well and is reset by CF9 RESET or RSMRST#.
Table 24-51. Offset 14h: NDA: Notify Device Address Register
Description:
View: PCI
Size: 8 bit
BAR: SM_BASE (IO)
Default: 00h
Bus:Device:Function: 0:31:3
Offset Start: 14h
Offset End: 14h
Power Well: Resume^a
Bit Range Bit Acronym
Bit Description
07 : 01
00
DEVICE_
ADDRESS
Reserved
This field contains the 7-bit device address received
during the Host Notify protocol of the SMBus
Specification. Software should only consider this field
valid when the HOST_NOTIFY_STS bit is set to 1.
Reserved
a. Reset by CF9 RESET or RSMRST#.
Sticky
Bit Reset
Value
0000000h
0h
Bit Access
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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