EP80579 Datasheet, PDF (1870/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 49-49. SPI Timing Specifications (Sheet 2 of 2)
Symbol
Parameter
Min
Max
t184
Setup of SPI_MISO with respect to serial
clock falling edge at the host
16
-
t185
Hold of SPI_MISO with respect to serial
clock falling edge at the host
0
-
t186
Setup of SPI_CS[1:0]# assertion with
respect to serial clock rising at the host
30
-
t187
Hold of SPI_CS[1:0]# deassertion with
respect to serial clock falling at the host
30
-
Notes:
1.
The typical clock frequency driven by the EP80579 is 17.86 MHz.
Units Figures Notes
ns
49-25
-
ns
49-25
-
ns
49-25
-
ns
49-25
-
Figure 49-25.SPI Timing Diagram
SPI_CLK
SPI_MOSI
SPI_MISO
t186
SPI_CS#
t182
t182
t183
t184
t185
t187
B6608-01
49.5.9
49.5.9.1
Low Pin Count (LPC)
The LPC interface is used to control all the logical blocks on the Serial I/O unit and
Watchdog Timer (SIW).LPC bus signals use PCI 33 MHz electrical signal characteristics.
Refer to the Low Pin Count (LPC) Interface Specification, Rev 1.1 for more information.
This section describes the electrical characteristics of the LPC interface.
LPC Signal List
For LPC pin description refer to Table 48-14, “LPC and FWH Interface Signals” on
page 1749.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1870
August 2009
Order Number: 320066-003US