EP80579 Datasheet, PDF (868/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
23.3.4.3
Offset 128h: PxSSTS[0-1] – Port [0-1] Serial ATA Status Register
This is a 32-bit register that conveys the current state of the interface and host. The
HBA updates it continuously and asynchronously. When the HBA transmits a
COMRESET to the device, this register is updated to its reset values.
Table 23-66. Offset 128h: PxSSTS[0-1] – Port [0-1] Serial ATA Status Register
Description:
View: PCI
BAR: ABAR
Bus:Device:Function: 0:31:2
Offset Start: 128h, 1A8h
Offset End: 12Bh, 1ABh
Size: 32 bit
Default: Variable
Power Well: Core
Bit Range
31 : 12
11 : 08
07 : 04
03 : 00
Bit Acronym
Bit Description
Sticky
Reserved
IPM
SPD
DET
Reserved
Interface Power Management (IPM): Indicates the
current interface state:
0h =Device not present or communication not established
1h =Interface in active state
2h =Interface in PARTIAL power management state
6h =Interface in SLUMBER power management state
All other values reserved.
This field reflects the interface power management state
for both device and host initiated power management.
Current Interface Speed (SPD): Indicates the
negotiated interface communication speed.
0h =Device not present or communication not established
1h =Generation 1 communication rate negotiated
2h =Generation 2 communication rate negotiated
All other values reserved
Device Detection (DET): Indicates the interface device
detection and Phy state.
0h = No device detected and Phy communication not
established
1h =Device presence detected but Phy communication not
established
3h =Device presence detected and Phy communication
established
4h =Phy in offline mode as a result of the interface being
disabled or running in a BIST loopback mode
All other values reserved.
Note that, while the true reset default value of this
register is 0h, the value read from this register depends
on drive presence and the point in time within the
initialization process when the register is read.
Bit Reset
Value
0h
0h
0h
Variable
Bit Access
RO
RO
RO
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
868
August 2009
Order Number: 320066-003US