EP80579 Datasheet, PDF (240/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
7.4.3
GCU: Bus M, Device 3, Function 0
The GCU includes the registers listed in Table 7-56 and Table 7-57. These registers
materialize in PCI configuration and memory (via PCI BAR) spaces. See Section 35.8,
“GCU Configuration Space: Bus M, Device 3, Function 0”and Chapter 38.0, “Register
Summary” for detailed discussion of these registers along with alternative
materializations.
Table 7-56. Bus M, Device 3, Function 0: Summary of GCU PCI Configuration Registers
Offset Start Offset End
Register ID - Description
00h
02h
04h
06h
08h
09h
0Eh
10h
2Ch
2Eh
34h
DCh
DDh
DEh
E0h
01h
03h
05h
07h
08h
0Bh
0Eh
13h
2Dh
2Fh
34h
DCh
DDh
DFh
E1h
“Offset 00h: VID: Vendor Identification Register” on page 1265
“Offset 02h: DID: Device Identification Register” on page 1266
“Offset 04h: PCICMD: Device Command Register” on page 1266
“Offset 06h: PCISTS: PCI Device Status Register” on page 1267
“Offset 08h: RID: Revision ID Register” on page 1268
“Offset 09h: CC: Class Code Register” on page 1268
“Offset 0Eh: HDR: Header Type Register” on page 1268
“Offset 10h: CSRBAR: Control and Status Registers Base Address Register” on
page 1269
“Offset 2Ch: SVID: Subsystem Vendor ID Register” on page 1269
“Offset 2Eh: SID: Subsystem ID Register” on page 1270
“Offset 34h: CP: Capabilities Pointer Register” on page 1270
“Offset DCh: PCID: Power Management Capability ID Register” on page 1270
“Offset DDh: PCP: Power Management Next Capability Pointer Register” on
page 1271
“Offset DEh: PMCAP: Power Management Capability Register” on page 1271
“Offset E0h: PMCS: Power Management Control and Status Register” on
page 1272
Default
Value
8086h
503Eh
0000h
0010h
Variable
FF0000h
00h
00000000h
0000h
0000h
DCh
01h
00h
0023h
0000h
Table 7-57. Bus M, Device 3, Function 0: Summary of GCU Registers Mapped Through
CSRBAR Memory BAR (Sheet 1 of 2)
Offset Start Offset End
Register ID - Description
Default
Value
00000010h
00000014h
00000018h
00000020h
00000024h
00000044h
00000050h
00000013h
00000017h
0000001Bh
00000023h
00000027h
00000047h
00000053h
“Offset 0x00000010h: MDIO_STATUS - MDIO Status Register” on page 1562
00000000h
“Offset 0x00000014h: MDIO_COMMAND - MDIO Command Register” on
page 1562
00000000h
“Offset 0x00000018h: MDIO_DRIVE - MDIO Drive Register” on page 1563
03030107h
“Offset 0x00000020h: MDC_DRIVE - MDC Drive Register” on page 1563
0303030Fh
“Offset 0x00000024h: GCU_GBE_RC_CTRL - GCU GbE RCOMP Control Register”
on page 1564
0031F31Fh
“Offset 0x00000044h: GCU_GBE_RC_STAT - GCU GbE RCOMP Status Register” on
page 1564
00000000h
“Offset 0x00000050h: GCU_LEB_RC_STAT - GCU Local Expansion Bus RCOMP
Status Register” on page 1565
63000300h
Intel^® EP80579 Integrated Processor Product Line Datasheet
240
August 2009
Order Number: 320066-003US