EP80579 Datasheet, PDF (694/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
17.1.1.7 Offset 0014h: V0CTL - Virtual Channel 0 Resource Control Register
Table 17-9. Offset 0014h: V0CTL - Virtual Channel 0 Resource Control Register
Description:
View: PCI
BAR: RCBA
Bus:Device:Function: 0:31:0
Offset Start: 0014h
Offset End: 0017h
Size: 32 bit
Default: 800000FFh
Power Well: Core
Bit Range
31
30 :27
26 :24
23 :20
19 :17
16
15 :08
07 :01
00
Bit Acronym
Bit Description
Sticky
EN
Reserved
ID
Reserved
PAS
LAT
Reserved
TCVC0M
TC0VC0M
Virtual Channel Enable: Enables the VC when set.
Disables the VC when cleared.
0 = Disables the VC
1 = Enables the VC
Reserved
Virtual Channel Identifier: Indicates the ID to use for
this virtual channel.
Reserved
Port Arbitration Select: Indicates which port table is
being programmed. The root complex takes no action on
this setting since the arbitration is fixed and there is no
arbitration table.
Load Port Arbitration Table: The root complex does not
implement an arbitration table for this virtual channel.
Reserved
Transaction Class / Virtual Channel 0 Map: Indicates
which transaction classes are mapped to this virtual
channel.
0 = This transaction class is not mapped to the virtual
channel 0.
1 = This transaction class is mapped to the virtual channel
0.
Transaction Class 0/Virtual Channel 0 Map: Indicates
that transaction class 0 is always mapped to VC0.
Bit Reset
Value
1h
0h
0h
0h
0h
0h
00h
7Fh
1h
Bit Access
RO
RO
RW
RO
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
694
August 2009
Order Number: 320066-003US