English
Language : 

EP80579 Datasheet, PDF (1524/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
37.6.6.35 RFC – Receive Fragment Count Register
This register counts the number of received frames that passed address filtering, and
were less than minimum size (64B from <Destination Address> through <CRC>,
inclusively), but had a bad CRC (this is slightly different from the “RUC – Receive
Undersize Count Register” on page 1523). This register will only increment if receives
are enabled.
Table 37-113.RFC: Receive Fragment Count Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 40A8h
Offset End: 40ABh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 40A8h
Offset End: 40ABh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 40A8h
Offset End: 40ABh
Size: 32 bits
Default: 00000000h
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
RFC
Number of receive fragment errors
Sticky
Bit Reset
Value
0h
Bit Access
RC
37.6.6.36 ROC – Receive Oversize Count Register
This register counts the number of received frames that passed address filtering, and
were greater than maximum size. Packets over 1522 bytes are oversized if
LongPacketEnable is clear (i.e. RCTL.LPE=0). If LongPacketEnable is set, then an
incoming, packet is considered oversized if it exceeds 16384 bytes. If receives are not
enabled, this register will not increment. These lengths are based on bytes in the
received packet from <Destination Address> through <CRC>, inclusively.
Table 37-114.ROC: Receive Oversize Count Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 40ACh
Offset End: 40AFh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 40ACh
Offset End: 40AFh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 40ACh
Offset End: 40AFh
Size: 32 bits
Default: 00000000h
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
ROC
Number of receive oversize errors
Sticky
Bit Reset
Value
0h
Bit Access
RC
Intel® EP80579 Integrated Processor Product Line Datasheet
1524
August 2009
Order Number: 320066-003US