EP80579 Datasheet, PDF (1061/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 27-15. Offset 10h: PROC_CNT - Processor Control Register (Sheet 2 of 3)
Description:
View: PCI
BAR: PMBASE (IO)
Bus:Device:Function: 0:31:0
Offset Start: 10h
Offset End: 10h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
Bit Acronym
Bit Description
Sticky
This write-once 3-bit field determines the duty cycle of
the throttling when the FORCE_THTL bit is set. The duty
cycle indicates the approximate percentage of time the
STPCLK# signal is asserted while in the thermal throttle
mode. The STPCLK# throttle period is 1024 PCICLKs.
Throttling only occurs if the system is in the C0 state. If
in the C2 state, no throttling occurs.
Once the PROCHOT_DTY field is written, subsequent
writes have no effect until PLTRST# goes active.
Bit Reset
Value
Bit Access
07 : 05
PROCHOT_
DTY
Bits[2:0]
PROCHOT_DTY
000
001
010
011
100
101
110
111
Throttle Mode
Default
(will be 50%)
87.5%
75.0%
62.5%
50%
37.5%
25%
12.5%
PCI Clocks
512
896
768
640
512
384
256
128
000h
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1061