EP80579 Datasheet, PDF (1647/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
41.6.1.7 Offset 0018h: TS_TSysTimeLo - Raw System Time Low Register
Register
Name
TS_RSysTimeLo
Access
(See below.) Reset Value 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RawSystemTime_Low[31:0]
Table 41-17. Offset 0018h: TS_RSysTimeLo Register
Description:
View: PCI
BAR: CSRBAR
Bus:Device:Function: M:7:0
Offset Start: 00000018h
Offset End: 0000001Bh
Size: 32 bits
Default: 0000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
31 : 0
This system time register is a read-only register of the raw
system time. It is, therefore, not loadable and reflects the
local time in the module.
• The lower 32 bits of the 64-bit system time are read
in this register.
• The upper 32 bits are read in the
RawSystemTime RawSystemTime_High register.
_Low
When a user reads system time with this pair of registers,
no latching of system time occurs, which means that the
system time could increment between the reading of the
lower 32 bits in this register and the upper 32 bits in the
RawSystemTime_High register. The user must account for
this and deal with possible increments between reads of
the two registers in firmware.
Bit Reset
Value
0000h
Bit Access
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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