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Intel^® EP80579 Integrated Processor
23.2.3.2 Offset 14h: DATA – AHCI Data Register
Table 23-48. Offset 14h: DATA – AHCI Data Register
Description:
View: PCI
BAR: LBAR (IO)
Bus:Device:Function: 0:31:2
Offset Start: 14h
Offset End: 17h
Size: 32 bit
Default: Variable
Power Well: Core
Bit Range
31 : 00
Bit Acronym
Bit Description
Sticky
DATA
Data (DATA)— R/W: This Data register is a “window”
through which data is read or written to the AHCI memory
mapped registers. A read or write to this Data register
triggers a corresponding read or write to the memory
mapped register pointed to by the Index register. The
Index register must be setup prior to the read or write to
this Data register.
Note that a physical register is not actually implemented
as the data is actually stored in the memory mapped
registers.
Since this is not a physical register, the “default” value is
the same as the default value of the register pointed to by
Index.
Bit Reset
Value
Variable
Bit Access
RW
23.3
SATA Memory Mapped Registers
The memory mapped registers within the SATA controller exist in non-cacheable
memory space. Additionally, locked accesses are not supported. If software attempts to
perform locked transactions to the registers, indeterminate results may occur. Register
accesses shall have a maximum size of 64 bits. 64 bit accesses must not cross an 8
byte alignment boundary.
The registers are broken into 2 sections – global control registers and port control
registers. All registers that start below address 100h are global and meant to apply to
the entire HBA. The port control registers are the same for all ports, and there are as
many registers banks as there are ports.
All registers not defined and all reserved bits within registers return ‘0’ when read.
Start
00
20
A0
100
180
200
280
300
End
1F
9F
FF
17F
1FF
27F
2FF
3FF
Generic Host Control
Reserved
Vendor Specific registers
Port 0 port control registers
Port 1 port control registers
Reserved
Reserved
Reserved
Description
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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