EP80579 Datasheet, PDF (141/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
5.2.2
5.3
5.3.1
Software Usage Model
The software responsibilities for error handling are split between BIOS and system/
application software. The manner in which the software uses the capabilities that the
hardware provides depends on the specific software stack under consideration.
In general, BIOS does not establish a usage model for error handling. Its primary
responsibility is to configure the error handling registers throughout the EP80579 in a
manner consistent with the needs of system and application software. The EP80579
reference BIOS provides this level of support. However, in general, a BIOS
implementation may also log information on error events reported via SMI¹. In this
case, BIOS populates data structures in SMBIOS² that an operating system can later
retrieve.
Generally speaking, the software is more interested in seeing an error rather than the
specific location where it is sent. The usage model from the system or application
perspective depends on the manner in which the hardware reports the event to the
system along with the specific error event. There are two general types of reporting
that one can consider: through a kernel-trapped signal and through a non-kernel-
trapped signal. A particular error event need be reported through at least one of these
mechanisms.
When the hardware reports an error event through a signal that the OS kernel handles
on its own (e.g., MCERR, SERR, etc.), the operating system takes whatever corrective
action it implements for the signal: bug check, panic, halt, reboot, event logging, clean
up and continue, etc. In this case, the OS kernel establishes the usage model. This
approach is only applicable to the IA and memory controller blocks since the AIOC
devices can only report error events through INTx or MSI signals that the OS kernel
passes off to the appropriate driver software rather than handle in the kernel.
When the hardware reports an error event error through a signal that the software
outside of the OS kernel handles on its own (e.g., INTx, MSI, etc.), it is the
responsibility of driver or other non-kernel software to take corrective action. All AIOC
agents fall into this category since their hardware uses only INTx or MSI for error
reporting. In this case, it is the responsibility of the driver software to establish the
error handling usage model. Typically, the action the driver takes in response to an
error event will match those taken by the OS kernel: panic, clean up and continue, etc.
Error Reporting by the IMCH
See Section 14.2, “Exception Handling” and Section 14.3, “Error Conditions Signaled”
for further discussion on IMCH error handling.
Overview of the First and Next Error Architecture
The IMCH provides a “first” and “next” error architecture wherein errors accumulate
locally in unit-level first/next error registers that the IMCH aggregates into global first/
next error registers. Once a unit records an error event in its “first” error register, it will
record all subsequent errors in its “next” error register until software clears the error
condition in the first error register. The error events are then classified into “fatal” and
“non-fatal” groups for reporting through the global first and next error registers. The
architecture allows software to mask individual error events at the unit level. In
addition, through per-unit registers, software can configure the hardware to report the
error event through IA SMI, SCI, SERR, or MCERR signals.
1. This approach only works for error events that the EP80579 can report through SMI. Specifically, this approach would not
work for error events from AIOC agents which cannot report through SMI in the EP80579.
2. System Management BIOS (SMBIOS) is a specification to lay out data structures and access methods in a BIOS which
provides for storage and retrieval of information about the PC in question
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
141