EP80579 Datasheet, PDF (1656/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
41.6.1.17 Offset 0040h: TS_Ch_Control[0-7] - Time Synchronization Channel
Control Register (Per Ethernet Channel)
Register
Name
TS_Ch_Control
Access
(See below.) Reset Value x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
*Address offsets per channel…
Channel 0 = 0x040
Channel 1 = 0x060
Channel 2 = 0x080
Channel 3 = 0x0A0
Channel 4 = 0x0C0
Channel 5 = 0x0E0
Channel 6 = 0x100
Channel 7 = 0x120
Table 41-27. Offset 0040h: TS_Ch_Control[0-7] - Time Synchronization Channel Control
Register (Per Ethernet Channel)
Description:
View: PCI
BAR: CSRBAR
Bus:Device:Function: M:7:0
0040h at
Offset Start: 20h
Offset End: 0043h at
20h
Size: 32 bits
Default: 0000h
Power Well: Core
Bit Range
31
Bit Acronym
Bit Description
Sticky
Version
Enables IEEE1588-2008 support
• ‘0’ - IEEE1588 v1 only (bits 20:16 ignored)
• ‘1’ - IEEE1588 v1 and IEEE1588-2008 (bit 1 ignored)
Bit Reset
Value
0
Bit Access
RW
30 21
20 16
15 3
RSVD
Mode
RSVD
Reserved for future use.
Must be written as ‘0’.
Selects timestamping configuration:
• ‘0’ - Timestamp PTP Version 1 SYNC and DELAY _REQ
messages only. Only IEEE1588 L4 frames are
decoded. Timestamps are locked.
• ‘1’ - Timestamp all PTP Version 1 messages. When
channel is Ethernet, then decode for only IEEE1588 L4
frames. Timestamps are not locked.
• ‘2 - Timestamp PTP Version 1 and 2 event messages
only. When channel is Ethernet, then decode for both
L4 and L2 IEEE1588 frames. Timestamps are locked.
• ‘3’ - Timestamp all PTP Version 1 and 2 messages.
When channel is Ethernet, then decode for both L4
and L2 IEEE1588 frames.Timestamps are not locked.
• ‘8’ - Timestamp user defined messages. Timestamps
are locked.
Refer to Table 41-8, “Timestamping Configurations” on
page 1633
NOTE: These settings are ignored for the CAN channels
Reserved for future use.
Must be written as ‘0’.
0
RW
0
RW
0
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1656
August 2009
Order Number: 320066-003US