EP80579 Datasheet, PDF (515/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.3.1.20 Offset A4h: EDMA_SMICMD - EDMA SMI Command Register
This register enables various errors to generate an SMI special cycle to the IICH. When
an error flag is set in the EDMA_FERR or EDMA_NERR registers, it generates an SERR,
SMI, or SCI special cycle when enabled in the SERRCMD, SMICMD, or SCICMD
registers, or a MCERR# on the FSB when enabled in the MCERRCMD, respectively. Note
that only one message type can be enabled. All channels are expected to use the same
reporting structure, so only one 8-bit register is implemented.
Table 16-132.Offset A4h: EDMA_SMICMD - EDMA SMI Command Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:1:0
Offset Start: A4h
Offset End: A4h
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Descriptor Address Type/Range Error SMI Enable:
Generate SMI if bit 7, 15, 23, or 31 is set in any of the
07
SMI_DSCPERR ^{EDMA_FERR or EDMA_NERR registers.}
0 = Disable
1 = Enable
Descriptor Address Alignment Error SMI Enable:
Generate SMI if bit 6, 14, 22, or 30 is set in any of the
06
SMI_DSCPAE ^{EDMA_FERR or EDMA_NERR registers.}
0 = Disable
1 = Enable
Source Address Type/Range Error SMI Enable:
Generate SMI if bit 5, 13, 21, or 29 is set in any of the
05
SMI_SRCERR ^{EDMA_FERR or EDMA_NERR registers.}
0 = Disable
1 = Enable
04
Reserved Reserved
Destination Address Type/Range Error SMI Enable:
Generate SMI if bit 3, 11, 19, or 27 is set in any of the
03
SMI_DSTERR ^{EDMA_FERR or EDMA_NERR registers.}
0 = Disable
1 = Enable
02
Reserved Reserved
Memory Data Parity Error SMI Enable: Generate SMI if
bit 1, 9, 17, or 25 is set in any of the EDMA_FERR or
01
SMI_MDPE1 ^{EDMA_NERR registers.}
0 = Disable
1 = Enable
Illegal Write Error SMI Enable: Generate SMI if bit 0, 8,
16, or 24 is set in any of the EDMA_FERR or EDMA_NERR
00
SMI_IWE ^registers.
0 = Disable
1 = Enable
Bit Reset
Value
0b
0b
0b
0b
0b
0b
0b
0b
Bit Access
RW
RW
RW
RW
RW
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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