EP80579 Datasheet, PDF (1220/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
34.2.2.8 Offset Dh: LT – Latency Timer Register
Table 34-10. Offset Dh: LT: Latency Timer Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: Dh
Offset End: Dh
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range Bit Acronym
07 : 00
LT
Latency Timer
Bit Description
Sticky
Bit Reset
Value
0h
Bit Access
RO
34.2.2.9 Offset Eh: HDR – Header Type Register
Table 34-11. Offset Eh: HDR: Header Type Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: Eh
Offset End: Eh
Size: 8 bit
Default: 1h
Power Well: Core
Bit Range Bit Acronym
07 : 00
HDR
PCI Header Type
Bit Description
Sticky
Bit Reset
Value
1
Bit Access
RO
34.2.2.10 Offset 10h: CSRBAR0 – Control and Status Registers Base Address
Register
Table 34-12. Offset 10h: CSRBAR0: Control and Status Registers Base Address Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: 10h
Offset End: 14h
Size: 32 bit
Default: 00h
Power Well: Core
Bit Range Bit Acronym
Bit Description
31 : 04
03
02 : 01
00
ZERO
PREF
TYP
MEM
These bits of the address are hardwired to zero for 128
Kbyte.
Prefetchable
BAR Type (64-bit)
Memory Space Indicator
Sticky
Bit Reset
Value
Bit Access
0h
RO
0h
RO
00b
RO
0h
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
1220
August 2009
Order Number: 320066-003US