EP80579 Datasheet, PDF (1295/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
35.10.1.6 Offset 09h: CC – Class Code Register
Table 35-97. Offset 09h: CC: Class Code Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:6:0
Offset Start: 09h
Offset End: 0Bh
Size: 24 bit
Default: 078000h
Power Well: Core
Bit Range
23 : 00
Bit Acronym
Bit Description
Sticky
Class Code: This value indicates the base class, subclass,
CC
and interface.
020000h = Network Controller / Ethernet controller
Bit Reset
Value
078000h
Bit Access
RO
35.10.1.7 Offset 0Eh: HDR – Header Type Register
Table 35-98. Offset 0Eh: HDR: Header Type Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:6:0
Offset Start: 0Eh
Offset End: 0Eh
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range
07 : 00
Bit Acronym
Bit Description
Sticky
HDR
PCI Header Type: The header type of the device.
00h = single-function device with standard header layout.
Bit Reset
Value
0h
Bit Access
RO
35.10.1.8 Offset 10h: CSRBAR – Control and Status Registers Base
Address Register
The CSRBAR is a PCI BAR in memory space that allows access to the control and status
registers for the SSP Unit. See Section 40.4, “Register Summary” on page 1606 for a
description of the registers this region exposes.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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