EP80579 Datasheet, PDF (1344/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.3
Functional Block Diagram
Figure 37-1. GbE Controller Block Diagram
Internal Bus Clock
Domain
Internal
Bus
Internal
Bus
LAN Clock Domain
1 Kbyte Tx 1 Kbyte
Descriptor Rx
Memory Descriptor
Memory
Host
Descriptor Engine
Interface
64- Kbyte
Packet Buffer
Data Memory Interface
DMA Engine
Interface
MAC Filtering
Tx MAC
Rx MAC
Interface
Translation
MAC Core
Target Logic
MII
GMII
GbE Controller
The internal bus interfaces provide the access to the GbE CSRs as well as the medium
over which ethernet packets are transferred between the Ethernet client and the
EP80579.
The DMA Engine buffers the packets between system memory and the MAC Core. The
MAC Core transfers packets between the DMA Engine and the Ethernet Client. The
internal bus interface accepts the PCI Configuration transactions and routes those
transactions to the proper internal module. These blocks all operate in the LAN clock
domain.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1344
August 2009
Order Number: 320066-003US