EP80579 Datasheet, PDF (1252/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
35.6.1.19 Offset DEh: PMCAP – Power Management Capability Register
For an overview of the power management capability of AIOC devices, see Section
35.5, “Power Management of AIOC Devices”. Note that Device 0 supports PME, Device
1 and 2 do not.
Table 35-24. Offset DEh: PMCAP: Power Management Capability Register
Description:
View: PCI 1
BAR: Configuration
Bus:Device:Function: M:0:0
Offset Start: DEh
Offset End: DFh
View: PCI 2
BAR: Configuration
Bus:Device:Function: M:1:0
Offset Start: DEh
Offset End: DFh
View: PCI 3
BAR: Configuration
Bus:Device:Function: M:2:0
Offset Start: DEh
Offset End: DFh
Size: 16 bit
Default: X023h
Power Well: Core
Bit Range Bit Acronym
Bit Description
15 : 11
10
09
08 : 06
05
04
03
02 : 00
PME_SPT
D2_SPT
D1_SPT
AUX_CRNT
DSI
Reserved
PME_CLI
VER
PME# Support
D2 Support
D1 Support
Aux Current
Device Specific Initialization
Reserved
PME Clock
Version
Sticky
Bit Reset
Value
X
0h
0h
0h
1
0h
0h
011b
Bit Access
RO
RO
RO
RO
RO
RV
RO
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
1252
August 2009
Order Number: 320066-003US