EP80579 Datasheet, PDF (702/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
17.1.5.2 Offset 3108h: D29IP - Device 29 Interrupt Pin Register
Table 17-21. Offset 3108h: D29IP - Device 29 Interrupt Pin Register
Description:
View: PCI
BAR: RCBA
Bus:Device:Function: 0:31:0
Offset Start: 3108h
Offset End: 310Bh
Size: 32 bit
Default: 10004321h
Power Well: Core
Bit Range
31 : 28
27 : 16
15 : 12
11 : 08
07 : 04
03 : 00
Bit Acronym
Bit Description
Sticky
EIP
Reserved
Reserved
Reserved
RSVD
U0P
EHCI Pin: Indicates which pin the EHCI controller drives
as its interrupt.
Bits Pin
Bits Pin
0h No Interrupt 1h INTA#
2h INTB#
3h INTC#
4h INTD#
5h–Fh Reserved
Reserved
Reserved
Reserved
Reserved.
UHCI 0 Pin: See the EIP description. Applies to UCHI
controller 0 (ports 0 and 1).
Bit Reset
Value
1h
0h
4h
3h
2h
1h
Bit Access
RW
RW
RW
17.1.5.3 Offset 3140h: D31IR - Device 31 Interrupt Route Register
Table 17-22. Offset 3140h: D31IR - Device 31 Interrupt Route Register (Sheet 1 of 2)
Description:
View: PCI
BAR: RCBA
Bus:Device:Function: 0:31:0
Offset Start: 3140h
Offset End: 3141h
Size: 16 bit
Default: 3210h
Power Well: Core
Bit Range
15
14 : 12
11
10 : 08
07
Bit Acronym
Bit Description
Sticky
Reserved
IDR
Reserved
ICR
Reserved
Reserved
Interrupt D Pin Route: Indicates which physical pin on
the IICH is connected to the INTD# pin reported for device
31 functions.
Bits Pin
0h PIRQA#
1h PIRQB#
2h PIRQC#
3h PIRQD#
Reserved
Interrupt C Pin Route: See the IDR description. This
field applies to INTC#.
Reserved
Bit Reset
Value
0h
3h
0h
2h
0h
Bit Access
RW
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
702
August 2009
Order Number: 320066-003US