EP80579 Datasheet, PDF (1362/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Figure 37-13.Case B: Using an Absolute Timer in conjunction with the Packet Timer
Absolute timer value
Absolute timer value
Pkt1 Pkt2 Pkt3
Packet timer expires Interrupt Generated. Absolute timer reset.
Pkt4 Pkt5 ….
Interrupt Generated (due to pkt #4) as
Absolute timer expires.
Packet delay timer disabled till next packet
is received and transferred to host memory
Case C in Figure 37-14 shows a scenario in which the packet timer expires even though
a packet was being transferred to the host memory. Illustrating the fact that the packet
timer is re-started only after a packet is transferred to host memory.
Figure 37-14.Case C: Packet Timer Expires Even Though A Packet Was Being Transferred to
the Host Memory.
Absolute timer value
Absolute timer value
Pkt1 Pkt2 Pkt3
Packet delay timer expires (due to pkt #3); both timers set to idle
Pkt4 Pkt5 ….
Interrupt Generated (due to pkt #4) as
Absolute timer expires
Packet delay timer disabled till next
packet is transferred to host memory
37.5.5.7.3
Small Receive Packet Detect (ICR.SRPD)
The Small Packet Receive Detect timer is independent of the other timers. It will
generate a receive interrupt when small-packet detection is enabled (RSRPD is set with
a non-zero value) and a packet of size less than or equal to RSRPD.SIZE has been
transferred into the host memory. When comparing the size the headers and CRC are
included (if CRC stripping is not enabled). CRC and VLAN headers are not included if
they have been stripped.
Receiving a small packet does not clear the absolute or packet delay timers, so one
packet may generate two receive interrupts, one due to the small packet reception and
one due to a timer expiration.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1362
August 2009
Order Number: 320066-003US