EP80579 Datasheet, PDF (456/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 16-68. Offset 48h: NSI_FERR - NSI First Error Register (Sheet 3 of 3)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:0:1
Offset Start: 48h
Offset End: 4Bh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
13
12
11
10
09
08
07
06
05
04 : 03
02
01
00
Bit Acronym
Bit Description
Sticky
RNRO
REPLAY_NUM Rollover Status: A 2-bit counter counts
the number of times the retry buffer has been
retransmitted. When this counter rolls over, this bit is set.
This bit is sticky through system reset.
Y
0 = Cleared by writing a ‘1’ to the bit location.
1 = REPLAY_NUM rollover detected.
BDLLP
Bad DLLP Status: This bit is set when the calculated DLLP
CRC is not equal to the received value. Also included are
8b/10b errors within the TLP including wrong disparity. An
invalid sequence number also sets this bit. This bit is sticky _Y
through system reset.
0 = Cleared by writing a ‘1’ to the bit location.
1 = Bad DLLP detected.
BTLP
Bad TLP Status:
0 = The calculated TLP CRC is equal to the received value.
1 = The calculated TLP CRC is not equal to the received
Y
value. Also included are 8b/10b errors within the TLP
including wrong disparity, and invalid sequence numbers.
Reserved Reserved
RCVRE
Receiver Error Status: Data is delivered over PCI
Express via packets built out of 8b/10b symbols. This error
is set for problems with the packet framing around these
symbols or with symbols received outside of recognized
Y
packets. This bit is sticky through system reset.
0 = Cleared by writing a ‘1’ to the bit location.
1 = Receiver Error detected.
Reserved Reserved
FEMR
Fatal Error Message Received:
0 = No Fatal Error Message Received over the NSI link.
1 = Fatal Error Message Received over the NSI link.
NEMR
Non-Fatal Error Message Received: Non-Fatal Error
Message Received over the NSI link.
0 = No Non-Fatal Error Message Received over the NSI
link.
1 = Non-Fatal Error Message Received over the NSI link.
CEMR
Correctable Error Message Received: Correctable Error
Message Received over the NSI link.
0 = No Correctable Error Message Received over the NSI
link.
1 = Correctable Error Message Received over the NSI link.
Reserved Reserved
PED
Parity Error Detected during parity conversion from
CTB: Parity Error detected on data received from the core.
0 = No Parity Error detected on data received from the
core.
1 = Parity Error detected on data received from the core.
Reserved Reserved
Link Down:
LD
0 = Link has not transitioned from DL_UP to DL_DOWN.
1 = Link transitioned from DL_UP to DL_DOWN.
Bit Reset
Value
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
Bit Access
RWC
RWC
RWC
RWC
RWC
RWC
RWC
RWC
RWC
Intel^® EP80579 Integrated Processor Product Line Datasheet
456
August 2009
Order Number: 320066-003US