EP80579 Datasheet, PDF (1363/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.5.5.7.4 Receive Descriptor Minimum Threshold (ICR.RXDMT)
The minimum descriptor threshold helps avoid descriptor under-run by generating an
interrupt when the number of free descriptors becomes equal to the minimum. It is
measured as a fraction of the receive descriptor ring size. This interrupt would stop and
re-initialize all of the active delayed receives interrupt timers until a new packet is
observed.
37.5.5.7.5 Receiver FIFO Overrun (ICR.RXO)
FIFO overrun occurs when hardware attempts to write a byte to a full FIFO. An overrun
could indicate that software has not updated the tail pointer to provide enough
descriptors/buffers, or that the internal bus is too slow draining the receive FIFO.
Incoming packets that overrun the FIFO are dropped and do not affect future packet
reception. This interrupt would stop and re-initialize all of the active delayed receive
interrupts.
37.5.5.8 Receive Packet Checksum Off loading
The GbE supports the off loading of three receive checksum calculations: the Packet
Checksum, the IPv4 Header Checksum, and the TCP/UDP Checksum. Ethernet II and
Ethernet SNAP frame types are supported.
The Packet checksum is the one's complement of the receive packet, starting from the
byte indicated by RXCSUM.PCSS (0 corresponds to the first byte of the packet), after
stripping. For example, for an Ethernet II frame encapsulated as an 802.3ac VLAN
packet and with RXCSUM.PCSS set to 14, the Packet Checksum would include the
entire encapsulated frame, excluding the 14-byte Ethernet header (DA, SA, Type and
Length) and the 4-byte q-tag. The Packet checksum will not include the Ethernet CRC if
the RCTL.SECRC bit is set.
Software must make the required offsetting computation (to back out the bytes that
should not have been included and to include the pseudo-header) prior to comparing
the Packet Checksum against the TCP checksum stored in the packet.
For supported packet/frame types, the entire checksum calculation may be off-loaded
to the GbE. If RXCSUM.IPOFLD is set to one, the GbE will calculate the IPv4 checksum
and indicate a pass/fail indication to software via the IPv4 Checksum Error bit
(RDESC.IPE) in the ERROR field of the receive descriptor. Similarly, if RXCSUM.TUOFLD
is set to one, the GbE will calculate the TCP or UDP checksum and indicate a pass/fail
condition to software via the TCP/UDP Checksum Error bit (RDESC.TCPE). These error
bits are valid when the respective status bits indicate the checksum was calculated for
the packet (RDESC.IPCS and RDESC.TCPCS respectively).
If neither RXCSUM.IPOFLD nor RXCSUM.TUOFLD are set, the Checksum Error bits (IPE
& TCPE) will be 0 for all packets.
Table 37-1. Supported Receive Checksum Capabilities (Sheet 1 of 2)
Packet Type
IPv4 packets
IPv6 packets
IPv6 packet with next header options:
• Hop-by-Hop options
• Destinations options
• Routing
• Fragment
HW IP Checksum
Calculation
Yes
N/A
N/A
N/A
N/A
N/A
HW TCP/UDP Checksum
Calculation
Yes
Yes
Yes
Yes
Yes
No
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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