EP80579 Datasheet, PDF (1169/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
33.0
33.1
33.2
Serial I/O Unit and Watchdog Timer
Overview
The Serial I/O unit and Watchdog Timer (SIW) is similar to currently available Super I/
O controllers. It is specifically designed for integration into the IICH. It is connected via
the LPC bus and currently consists of two UARTs, a Serial Interrupt Controller, a
Watchdog Timer and the LPC interface.
Features
LPC Interface
• Multiplexed command, address and data bus.
• 8-bit I/O transfers.
• 16-bit address qualification for I/O transactions.
• Serial IRQ interface compatible with serialized IRQ support for PCI systems.
Serial Port
• Two Full Function 16550 Compatible Serial Ports.
• Configurable I/O addresses and interrupts.
• 16-Byte FIFOs.
• Supports up to 115 Kbps.
• Programmable Baud Rate Generator.
• Modem Control Circuitry.
• 14.7456 MHz and 48 MHz supported for UART baud clock input.
Watchdog Timer (WDT)
Selectable Prescaler – approximately 1 MHz (1 µs to 1 s) and approximately 1 KHz (1
ms to 10 min).
• 33 MHz Clock (30 ns Clock Ticks).
• Multiple Modes (WDT and Free-Running).
• Free-Running Mode:
— 1 Stage Timer - Toggles WDT_TOUT# after programmable time.
• WDT Mode:
— 2 Stage Timer (First stage generates interrupt, second stage drives
WDT_TOUT# low).
First stage generates an SERIRQ, SMI or NMI interrupt (depending on which is
enabled) after Programmable time.
Second stage drives WDT_OUT# low or inverts the previous value.
Used only after first timeout occurs.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1169