EP80579 Datasheet, PDF (35/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Contents
35.6.1.3 Offset 02h: DID – Device Identification Register ................................1242
35.6.1.4 Offset 02h: DID – Device Identification Register ................................1242
35.6.1.5 Offset 04h: PCICMD – Device Command Register ...............................1243
35.6.1.6 Offset 06h: PCISTS – Device Status Register .....................................1244
35.6.1.7 Offset 08h: RID – Revision ID Register .............................................1245
35.6.1.8 Offset 09h: CC – Class Code Register ...............................................1245
35.6.1.9 Offset 0Eh: HDR – Header Type Register...........................................1246
35.6.1.10 Offset 10h: CSRBAR – Control and Status Registers Base
Address Register............................................................................1246
35.6.1.11 Offset 14h: IOBAR – CSR I/O Mapped BAR Register............................1247
35.6.1.12 Offset 2Ch: SVID – Subsystem Vendor ID Register.............................1248
35.6.1.13 Offset 2Eh: SID – Subsystem ID Register..........................................1248
35.6.1.14 Offset 34h: CP – Capabilities Pointer Register ....................................1248
35.6.1.15 Offset 3Ch: IRQL – Interrupt Line Register ........................................1249
35.6.1.16 Offset 3Dh: IRQP – Interrupt Pin Register .........................................1250
35.6.1.17 Offset DCh: PCID – Power Management Capability ID Register.............1251
35.6.1.18 Offset DDh: PCP – Power Management Next Capability Pointer
Register .......................................................................................1251
35.6.1.19 Offset DEh: PMCAP – Power Management Capability Register...............1252
35.6.1.20 Offset E0h: PMCS – Power Management Control and Status
Register .......................................................................................1253
35.6.1.21 Offset E4h: SCID – Signal Target Capability ID Register ......................1254
35.6.1.22 Offset E5h: SCP – Signal Target Next Capability Pointer Register..........1254
35.6.1.23 Offset E6h: SBC – Signal Target Byte Count Register ..........................1255
35.6.1.24 Offset E7h: STYP – Signal Target Capability Type Register...................1255
35.6.1.25 Offset E8h: SMIA – Signal Target IA Mask Register.............................1256
35.6.1.26 Offset E9h: Reserved Register .........................................................1256
35.6.1.27 Offset EAh: Reserved Register .........................................................1256
35.6.1.28 Offset ECh: SINT – Signal Target Raw Interrupt Register.....................1257
35.6.1.29 Offset F0h: MCID – Message Signalled Interrupt Capability ID
Register .......................................................................................1258
35.6.1.30 Offset F1h: MCP – Message Signalled Interrupt Next Capability Pointer
Register .......................................................................................1258
35.6.1.31 Offset F2h: MCTL – Message Signalled Interrupt Control Register .........1259
35.6.1.32 Offset F4h: MADR – Message Signalled Interrupt Address
Register .......................................................................................1259
35.6.1.33 Offset F8h: MDATA – Message Signalled Interrupt Data Register ..........1260
35.7 Gigabit Ethernet MAC I/O Spaces: Bus M, Device 0-2, Function 0 .........................1261
35.7.1 Register Details ....................................................................................1262
35.7.1.1 Offset 0000h: IOADDR - IOADDR Register ........................................1262
35.7.1.2 Offset 0004h: IODATA - IODATA Register .........................................1264
35.8 GCU Configuration Space: Bus M, Device 3, Function 0........................................1265
35.8.1 Register Details ....................................................................................1265
35.8.1.1 Offset 00h: VID – Vendor Identification Register ................................1265
35.8.1.2 Offset 02h: DID – Device Identification Register ................................1266
35.8.1.3 Offset 04h: PCICMD – Device Command Register ...............................1266
35.8.1.4 Offset 06h: PCISTS – Device Status Register .....................................1267
35.8.1.5 Offset 08h: RID – Revision ID Register .............................................1267
35.8.1.6 Offset 09h: CC – Class Code Register ...............................................1268
35.8.1.7 Offset 0Eh: HDR – Header Type Register...........................................1268
35.8.1.8 Offset 10h: CSRBAR – Control and Status Registers Base
Address Register............................................................................1269
35.8.1.9 Offset 2Ch: SVID – Subsystem Vendor ID Register.............................1269
35.8.1.10 Offset 2Eh: SID – Subsystem ID Register..........................................1270
35.8.1.11 Offset 34h: CP – Capabilities Pointer Register ....................................1270
35.8.1.12 Offset DCh: PCID – Power Management Capability ID Register.............1270
35.8.1.13 Offset DDh: PCP – Power Management Next Capability Pointer
Register .......................................................................................1271
35.8.1.14 Offset DEh: PMCAP – Power Management Capability Register...............1271
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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