EP80579 Datasheet, PDF (1385/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Note:
The IPv4 header is first shown in the traditional (i.e., RFC 791) representation, and
because byte and bit ordering is confusing in that representation. The IP header is also
shown in Little-Endian format, since the actual data will be fetched from memory in
Little-Endian format.
Figure 37-35.IPv4 Header (Traditional Representation)
00000000001111111111222222222233
01234567890123456789012345678901
Version
IP Hdr
Length
TYPE of Service
Identification
Flags
Time to Live
Layer 4 Protocol ID
Source Address
Destination Address
Options
Total Length
Fragment Offset
Header Checksum
Figure 37-36.IPv4 Header (Little-Endian Order)
Byte 3
Byte 2
Byte 1
Byte 0
76543210765432107654321076543210
LSB
Total Length
MSB
TYPE of Service
Version
IP Hdr
Length
Fragment Offset Low
Header Checksum
Fragment
Offset High
LSB
Identification
Layer 4 Protocol ID
Time to Live
Source Address
Destination Address
Options
MSB
Figure 37-35 and Figure 37-36: Flag Bit Definition:
• MF: More Fragments (hardware does not evaluate or change this bit)
• NF: No Fragments (hardware does not evaluate or change this bit)
• RSV: Reserved
Note:
The IPv6 header is shown in the traditional (i.e. RFC 2460), Big-Endian representation.
The actual data will be fetched from memory in Little-Endian format, similar to the IPv4
header shown above.
Figure 37-37.IPv6 Header (Traditional Representation)
00000000001111111111222222222233
01234567890123456789012345678901
Version
Traffic Class
Payload Length
Flow Label
Next Header
Hop Limit
Source Address
Destination Address
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1385