EP80579 Datasheet, PDF (617/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.5.1.15 Offset B4h: DQSOFCS00 - DQS Calibration Register
This register determines DQS3, 2, 1, & 0 fine DQS delay when reading from rank 0.
Table 16-240.Offset B4h: DQSOFCS00 - DQS Calibration Register
Description: DQSOFCS00: DQS Calibration Register
View: PCI
BAR: SMRBASE
Bus:Device:Function: 0:0:0
Offset Start: B4h
Offset End: B7h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 :28
27 :24
23 :20
19 :16
15 :12
11 :08
07 :04
03 :00
Bit Acronym
Bit Description
Reserved
DQS03
Reserved
DQS02
Reserved
DQS01
Reserved
DQS00
Reserved
Rank 0 DQS03: Fine delay
Reserved
Rank 0 DQS02: Fine delay
Reserved
Rank 0 DQS01: Fine delay
Reserved
Rank 0 DQS00: Fine delay
Sticky
N
Y
N
Y
N
Y
N
Y
Bit Reset
Value
0h
0h
0h
0h
0h
0h
0h
0h
Bit Access
RO
RW
RO
RW
RO
RW
RO
RW
16.5.1.16 Offset B8h: DQSOFCS01 - DQS Calibration Register
This register determines DQS7, 6, 5, & 4 fine DQS delay when reading from rank 0.
Table 16-241.Offset B8h: DQSOFCS01 - DQS Calibration Register
Description: DQSOFCS01: DQS Calibration Register
View: PCI
BAR: SMRBASE
Bus:Device:Function: 0:0:0
Offset Start: B8h
Offset End: BBh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 :28
27 :24
23 :20
19 :16
15 :12
11 :08
7 :04
3 :00
Bit Acronym
Bit Description
Reserved
DQS07
Reserved
DQS06
Reserved
DQS05
Reserved
DQS04
Reserved
Rank 0 DQS07: Fine delay
Reserved
Rank 0 DQS06: Fine delay
Reserved
Rank 0 DQS05: Fine delay
Reserved
Rank 0 DQS04: Fine delay
Sticky
N
Y
N
Y
N
Y
N
Y
Bit Reset
Value
0h
0h
0h
0h
0h
0h
0h
0h
Bit Access
RO
RW
RO
RW
RO
RW
RO
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
617