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EP80579 Datasheet, PDF (1905/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
Table 49-103.CRU Differential Input Clock Timing Specifications (Sheet 2 of 2)
Symbol
Parameter
Min
Nom
Max
Unit
Figures
Notes
CLKN100/CLKP100 (133MHz FSB clock)
-
CLK100 Frequency
-
133
MHz
-
-
-
Duty Cycle
45
-
55
%
-
6
T1
CLK100 Period
7.497
-
7.65
ns
49-47
1, 6
T2
CLK100 Period Stability
N/A
-
200
ps
2, 6
-
Frequency Tolerance
-
-
350
ppm
-
-
-
Clock Jitter
-
50
150
ps
-
-
T3
TPH CLK100 Pulse High Time
3.375
3.75
4.2075
ns
49-47
4, 6
T4
TPL CLK100 Pulse Low Time
3.375
3.75
4.2075
ns
49-47
4, 6
T5
CLK100 Rise Time
175
700
ps
49-47
3, 5, 6
T6
CLK100 Fall Time
175
700
ps
49-47
3, 5, 6
Notes:
1.
The period specified here is the average period. A given period may vary from this specification as governed by the
period Stability specification (T2).
2.
In this context, period stability is defined as the worst case timing difference between successive crossover voltages. In
other words, the largest absolute difference between adjacent clock periods must be less than the period stability.
3.
Slew rate is measured between the 35% and 65% points of the clock swing (VL to VH).
4.
Combining the longest clock-high and clock-low times would violate the max clock period, and that combining the
shortest clock-high and clock-low times would violate the minimum clock period. The clock-high and clock-low times
specify the most extreme allowable combination of clock period and duty cycle.
5.
Slew rate specifications apply to both rising and falling edges.
6.
Guaranteed by design. These values are typical values seen for this process, but not measured during production
testing.
49.5.21 Sideband Miscellaneous Signals
This section describes the electrical characteristics of the Sideband Miscellaneous
signals.
49.5.21.1 Sideband Miscellaneous Signals Signal List
For a pin description for these sideband signals, refer to Table 48-6, “Sideband
Miscellaneous Signals” on page 1737.
49.5.21.2 Sideband Miscellaneous Signals DC Characteristics
Table 49-104.Sideband Miscellaneous Signals DC Input Characteristics
Symbol
Parameter
Conditions
Min Typical Max
Units
Notes
VIH
Input voltage high
-
2.0
-
-
V
-
VIL
Input voltage low
-
-
-
0.8
V
-
Ιleak
Input Leakage
Current
0<VIN<Vcc3_3
-
-
10
µA
-
CIN
Input-pin
capacitance
-
-
-
10
pf
1
Notes:
1.
Guaranteed by design. These values are typical values seen for this process, but not measured during
production testing.
August 2009
Order Number: 320066-003US
Intel® EP80579 Integrated Processor Product Line Datasheet
1905