EP80579 Datasheet, PDF (1498/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.6.5.8
TDT – Transmit Descriptor Tail Register
This register contains the tail pointer for the transmit descriptor ring. It points to a 16B
datum. Software writes the tail pointer to add more descriptors to the transmit ready
queue. Hardware attempts to transmit all packets referenced by descriptors between
head and tail.
Table 37-74. TDT: Transmit Descriptor Tail Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 3818h
Offset End: 381Bh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 3818h
Offset End: 381Bh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 3818h
Offset End: 381Bh
Size: 32 bits
Default: 00000000h
GbE0: Core
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 16
15 : 00
Rsvd
TDT
Reserved
Transmit Descriptor Tail
Sticky
Bit Reset
Value
0h
0h
Bit Access
RV
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1498
August 2009
Order Number: 320066-003US