EP80579 Datasheet, PDF (1240/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 35-5. Bus M, Device2, Function 0: Summary of Gigabit Ethernet MAC Interface PCI
Configuration Registers (Sheet 2 of 2)
Offset Start Offset End
Register ID - Description
Default
Value
F1h
F1h
“Offset F1h: MCP: Message Signalled Interrupt Next Capability Pointer Register” on
page 1258
00h
F2h
F3h
“Offset F2h: MCTL: Message Signalled Interrupt Control Register” on page 1259 0000h
F4h
F7h
“Offset F4h: MADR: Message Signalled Interrupt Address Register” on page 1259 00000000h
F8h
F9h
“Offset F8h: MDATA: Message Signalled Interrupt Data Register” on page 1260 0000h
35.6.1.1
Offset 00h: VID – Vendor Identification Register
The VID Register contains the vendor identification number. This 16-bit register
combined with the Device Identification Register uniquely identifies any PCI device.
Writes to this register have no effect.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1240
August 2009
Order Number: 320066-003US