EP80579 Datasheet, PDF (1217/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
34.2.2
34.2.2.1
PCI-to-PCI Bridge Configuration Space
Offset 0h: VID – Vendor Identification Register
Table 34-3. Offset 0h: VID: Vendor Identification Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: 0h
Offset End: 1h
Size: 16 bit
Default: 8086h
Power Well: Core
Bit Range Bit Acronym
15 : 00
VID
Vendor ID
Bit Description
Sticky
Bit Reset
Value
8086h
Bit Access
RO
34.2.2.2 Offset 2h: DID – Device Identification Register
Table 34-4. Offset 2h: DID: Device Identification Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: 2h
Offset End: 3h
Size: 16 bit
Default: 5037h
Power Well: Core
Bit Range Bit Acronym
15 : 00
DID
Device ID
Bit Description
Sticky
Bit Reset
Value
5037h
Bit Access
RO
34.2.2.3 Offset 4h: PCICMD – Device Command Register
Table 34-5. Offset 4h: PCICMD: Device Command Register (Sheet 1 of 2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:4:0
Offset Start: 4h
Offset End: 5h
Size: 16 bit
Default: 0h
Power Well: Core
Bit Range Bit Acronym
Bit Description
15 : 11
10
09
08
07
06
05
RV
INTD
FBTB
SER
RV
PER
VPS
Reserved
Interrupt Disable
Fast Back-to-Back Enable
SERR# Enable
Reserved
Parity Error Response
VGA Palette Snoop
Sticky
Bit Reset
Value
0h
0h
0h
0h
0h
0h
0h
Bit Access
RV
RW
RO
RW
RV
RW
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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